1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 4*c66ec88fSEmmanuel Vadot * Copyright (C) 2016 Glider bvba 5*c66ec88fSEmmanuel Vadot */ 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel Vadot #ifndef __DT_BINDINGS_POWER_R8A77965_SYSC_H__ 8*c66ec88fSEmmanuel Vadot #define __DT_BINDINGS_POWER_R8A77965_SYSC_H__ 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel Vadot /* 11*c66ec88fSEmmanuel Vadot * These power domain indices match the numbers of the interrupt bits 12*c66ec88fSEmmanuel Vadot * representing the power areas in the various Interrupt Registers 13*c66ec88fSEmmanuel Vadot * (e.g. SYSCISR, Interrupt Status Register) 14*c66ec88fSEmmanuel Vadot */ 15*c66ec88fSEmmanuel Vadot 16*c66ec88fSEmmanuel Vadot #define R8A77965_PD_CA57_CPU0 0 17*c66ec88fSEmmanuel Vadot #define R8A77965_PD_CA57_CPU1 1 18*c66ec88fSEmmanuel Vadot #define R8A77965_PD_A3VP 9 19*c66ec88fSEmmanuel Vadot #define R8A77965_PD_CA57_SCU 12 20*c66ec88fSEmmanuel Vadot #define R8A77965_PD_CR7 13 21*c66ec88fSEmmanuel Vadot #define R8A77965_PD_A3VC 14 22*c66ec88fSEmmanuel Vadot #define R8A77965_PD_3DG_A 17 23*c66ec88fSEmmanuel Vadot #define R8A77965_PD_3DG_B 18 24*c66ec88fSEmmanuel Vadot #define R8A77965_PD_A2VC1 26 25*c66ec88fSEmmanuel Vadot 26*c66ec88fSEmmanuel Vadot /* Always-on power area */ 27*c66ec88fSEmmanuel Vadot #define R8A77965_PD_ALWAYS_ON 32 28*c66ec88fSEmmanuel Vadot 29*c66ec88fSEmmanuel Vadot #endif /* __DT_BINDINGS_POWER_R8A77965_SYSC_H__ */ 30