1*5def4c47SEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */ 2*5def4c47SEmmanuel Vadot /* 3*5def4c47SEmmanuel Vadot * Copyright (c) 2020 MediaTek Inc. 4*5def4c47SEmmanuel Vadot * Author: Weiyi Lu <weiyi.lu@mediatek.com> 5*5def4c47SEmmanuel Vadot */ 6*5def4c47SEmmanuel Vadot 7*5def4c47SEmmanuel Vadot #ifndef _DT_BINDINGS_POWER_MT8183_POWER_H 8*5def4c47SEmmanuel Vadot #define _DT_BINDINGS_POWER_MT8183_POWER_H 9*5def4c47SEmmanuel Vadot 10*5def4c47SEmmanuel Vadot #define MT8183_POWER_DOMAIN_AUDIO 0 11*5def4c47SEmmanuel Vadot #define MT8183_POWER_DOMAIN_CONN 1 12*5def4c47SEmmanuel Vadot #define MT8183_POWER_DOMAIN_MFG_ASYNC 2 13*5def4c47SEmmanuel Vadot #define MT8183_POWER_DOMAIN_MFG 3 14*5def4c47SEmmanuel Vadot #define MT8183_POWER_DOMAIN_MFG_CORE0 4 15*5def4c47SEmmanuel Vadot #define MT8183_POWER_DOMAIN_MFG_CORE1 5 16*5def4c47SEmmanuel Vadot #define MT8183_POWER_DOMAIN_MFG_2D 6 17*5def4c47SEmmanuel Vadot #define MT8183_POWER_DOMAIN_DISP 7 18*5def4c47SEmmanuel Vadot #define MT8183_POWER_DOMAIN_CAM 8 19*5def4c47SEmmanuel Vadot #define MT8183_POWER_DOMAIN_ISP 9 20*5def4c47SEmmanuel Vadot #define MT8183_POWER_DOMAIN_VDEC 10 21*5def4c47SEmmanuel Vadot #define MT8183_POWER_DOMAIN_VENC 11 22*5def4c47SEmmanuel Vadot #define MT8183_POWER_DOMAIN_VPU_TOP 12 23*5def4c47SEmmanuel Vadot #define MT8183_POWER_DOMAIN_VPU_CORE0 13 24*5def4c47SEmmanuel Vadot #define MT8183_POWER_DOMAIN_VPU_CORE1 14 25*5def4c47SEmmanuel Vadot 26*5def4c47SEmmanuel Vadot #endif /* _DT_BINDINGS_POWER_MT8183_POWER_H */ 27