1*aa1a8ff2SEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ 2c66ec88fSEmmanuel Vadot /* 3c66ec88fSEmmanuel Vadot * Copyright (c) 2019 Amlogic, Inc. 4c66ec88fSEmmanuel Vadot * Author: Jianxin Pan <jianxin.pan@amlogic.com> 5c66ec88fSEmmanuel Vadot */ 6c66ec88fSEmmanuel Vadot 7c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_MESON_A1_POWER_H 8c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_MESON_A1_POWER_H 9c66ec88fSEmmanuel Vadot 10c66ec88fSEmmanuel Vadot #define PWRC_DSPA_ID 8 11c66ec88fSEmmanuel Vadot #define PWRC_DSPB_ID 9 12c66ec88fSEmmanuel Vadot #define PWRC_UART_ID 10 13c66ec88fSEmmanuel Vadot #define PWRC_DMC_ID 11 14c66ec88fSEmmanuel Vadot #define PWRC_I2C_ID 12 15c66ec88fSEmmanuel Vadot #define PWRC_PSRAM_ID 13 16c66ec88fSEmmanuel Vadot #define PWRC_ACODEC_ID 14 17c66ec88fSEmmanuel Vadot #define PWRC_AUDIO_ID 15 18c66ec88fSEmmanuel Vadot #define PWRC_OTP_ID 16 19c66ec88fSEmmanuel Vadot #define PWRC_DMA_ID 17 20c66ec88fSEmmanuel Vadot #define PWRC_SD_EMMC_ID 18 21c66ec88fSEmmanuel Vadot #define PWRC_RAMA_ID 19 22c66ec88fSEmmanuel Vadot #define PWRC_RAMB_ID 20 23c66ec88fSEmmanuel Vadot #define PWRC_IR_ID 21 24c66ec88fSEmmanuel Vadot #define PWRC_SPICC_ID 22 25c66ec88fSEmmanuel Vadot #define PWRC_SPIFC_ID 23 26c66ec88fSEmmanuel Vadot #define PWRC_USB_ID 24 27c66ec88fSEmmanuel Vadot #define PWRC_NIC_ID 25 28c66ec88fSEmmanuel Vadot #define PWRC_PDMIN_ID 26 29c66ec88fSEmmanuel Vadot #define PWRC_RSA_ID 27 30c66ec88fSEmmanuel Vadot #define PWRC_MAX_ID 28 31c66ec88fSEmmanuel Vadot 32c66ec88fSEmmanuel Vadot #endif 33