1*84943d6fSEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 2*84943d6fSEmmanuel Vadot /* 3*84943d6fSEmmanuel Vadot * Copyright (c) 2022 MediaTek Inc. 4*84943d6fSEmmanuel Vadot */ 5*84943d6fSEmmanuel Vadot 6*84943d6fSEmmanuel Vadot #ifndef _DT_BINDINGS_POWER_MT8365_POWER_H 7*84943d6fSEmmanuel Vadot #define _DT_BINDINGS_POWER_MT8365_POWER_H 8*84943d6fSEmmanuel Vadot 9*84943d6fSEmmanuel Vadot #define MT8365_POWER_DOMAIN_MM 0 10*84943d6fSEmmanuel Vadot #define MT8365_POWER_DOMAIN_CONN 1 11*84943d6fSEmmanuel Vadot #define MT8365_POWER_DOMAIN_MFG 2 12*84943d6fSEmmanuel Vadot #define MT8365_POWER_DOMAIN_AUDIO 3 13*84943d6fSEmmanuel Vadot #define MT8365_POWER_DOMAIN_CAM 4 14*84943d6fSEmmanuel Vadot #define MT8365_POWER_DOMAIN_DSP 5 15*84943d6fSEmmanuel Vadot #define MT8365_POWER_DOMAIN_VDEC 6 16*84943d6fSEmmanuel Vadot #define MT8365_POWER_DOMAIN_VENC 7 17*84943d6fSEmmanuel Vadot #define MT8365_POWER_DOMAIN_APU 8 18*84943d6fSEmmanuel Vadot 19*84943d6fSEmmanuel Vadot #endif /* _DT_BINDINGS_POWER_MT8365_POWER_H */ 20