xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/power/imx8ulp-power.h (revision e67e85659c0de33e617e5fbf1028c6e8b49eee53) 
1*e67e8565SEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
2*e67e8565SEmmanuel Vadot /*
3*e67e8565SEmmanuel Vadot  *  Copyright 2021 NXP
4*e67e8565SEmmanuel Vadot  */
5*e67e8565SEmmanuel Vadot 
6*e67e8565SEmmanuel Vadot #ifndef __DT_BINDINGS_IMX8ULP_POWER_H__
7*e67e8565SEmmanuel Vadot #define __DT_BINDINGS_IMX8ULP_POWER_H__
8*e67e8565SEmmanuel Vadot 
9*e67e8565SEmmanuel Vadot #define IMX8ULP_PD_DMA1		0
10*e67e8565SEmmanuel Vadot #define IMX8ULP_PD_FLEXSPI2	1
11*e67e8565SEmmanuel Vadot #define IMX8ULP_PD_USB0		2
12*e67e8565SEmmanuel Vadot #define IMX8ULP_PD_USDHC0	3
13*e67e8565SEmmanuel Vadot #define IMX8ULP_PD_USDHC1	4
14*e67e8565SEmmanuel Vadot #define IMX8ULP_PD_USDHC2_USB1	5
15*e67e8565SEmmanuel Vadot #define IMX8ULP_PD_DCNANO	6
16*e67e8565SEmmanuel Vadot #define IMX8ULP_PD_EPDC		7
17*e67e8565SEmmanuel Vadot #define IMX8ULP_PD_DMA2		8
18*e67e8565SEmmanuel Vadot #define IMX8ULP_PD_GPU2D	9
19*e67e8565SEmmanuel Vadot #define IMX8ULP_PD_GPU3D	10
20*e67e8565SEmmanuel Vadot #define IMX8ULP_PD_HIFI4	11
21*e67e8565SEmmanuel Vadot #define IMX8ULP_PD_ISI		12
22*e67e8565SEmmanuel Vadot #define IMX8ULP_PD_MIPI_CSI	13
23*e67e8565SEmmanuel Vadot #define IMX8ULP_PD_MIPI_DSI	14
24*e67e8565SEmmanuel Vadot #define IMX8ULP_PD_PXP		15
25*e67e8565SEmmanuel Vadot 
26*e67e8565SEmmanuel Vadot #endif
27