xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/power/imx8mp-power.h (revision 7ef62cebc2f965b0f640263e179276928885e33d)
1c9ccf3a3SEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
2c9ccf3a3SEmmanuel Vadot /*
3c9ccf3a3SEmmanuel Vadot  *  Copyright (C) 2020 Pengutronix, Sascha Hauer <kernel@pengutronix.de>
4c9ccf3a3SEmmanuel Vadot  */
5c9ccf3a3SEmmanuel Vadot 
6c9ccf3a3SEmmanuel Vadot #ifndef __DT_BINDINGS_IMX8MP_POWER_DOMAIN_POWER_H__
7c9ccf3a3SEmmanuel Vadot #define __DT_BINDINGS_IMX8MP_POWER_DOMAIN_POWER_H__
8c9ccf3a3SEmmanuel Vadot 
9c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_MIPI_PHY1			0
10c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_PCIE_PHY			1
11c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_USB1_PHY			2
12c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_USB2_PHY			3
13c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_MLMIX			4
14c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_AUDIOMIX			5
15c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_GPU2D			6
16c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_GPUMIX			7
17c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_VPUMIX			8
18c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_GPU3D			9
19c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_MEDIAMIX			10
20c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_VPU_G1			11
21c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_VPU_G2			12
22c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_VPU_VC8000E			13
23c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_HDMIMIX			14
24c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_HDMI_PHY			15
25c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_MIPI_PHY2			16
26c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_HSIOMIX			17
27c9ccf3a3SEmmanuel Vadot #define IMX8MP_POWER_DOMAIN_MEDIAMIX_ISPDWP		18
28c9ccf3a3SEmmanuel Vadot 
29c9ccf3a3SEmmanuel Vadot #define IMX8MP_HSIOBLK_PD_USB				0
30c9ccf3a3SEmmanuel Vadot #define IMX8MP_HSIOBLK_PD_USB_PHY1			1
31c9ccf3a3SEmmanuel Vadot #define IMX8MP_HSIOBLK_PD_USB_PHY2			2
32c9ccf3a3SEmmanuel Vadot #define IMX8MP_HSIOBLK_PD_PCIE				3
33c9ccf3a3SEmmanuel Vadot #define IMX8MP_HSIOBLK_PD_PCIE_PHY			4
34c9ccf3a3SEmmanuel Vadot 
35d5b0e70fSEmmanuel Vadot #define IMX8MP_MEDIABLK_PD_MIPI_DSI_1			0
36d5b0e70fSEmmanuel Vadot #define IMX8MP_MEDIABLK_PD_MIPI_CSI2_1			1
37d5b0e70fSEmmanuel Vadot #define IMX8MP_MEDIABLK_PD_LCDIF_1			2
38d5b0e70fSEmmanuel Vadot #define IMX8MP_MEDIABLK_PD_ISI				3
39d5b0e70fSEmmanuel Vadot #define IMX8MP_MEDIABLK_PD_MIPI_CSI2_2			4
40d5b0e70fSEmmanuel Vadot #define IMX8MP_MEDIABLK_PD_LCDIF_2			5
41d5b0e70fSEmmanuel Vadot #define IMX8MP_MEDIABLK_PD_ISP				6
42d5b0e70fSEmmanuel Vadot #define IMX8MP_MEDIABLK_PD_DWE				7
43d5b0e70fSEmmanuel Vadot #define IMX8MP_MEDIABLK_PD_MIPI_DSI_2			8
44d5b0e70fSEmmanuel Vadot 
45d5b0e70fSEmmanuel Vadot #define IMX8MP_HDMIBLK_PD_IRQSTEER			0
46d5b0e70fSEmmanuel Vadot #define IMX8MP_HDMIBLK_PD_LCDIF				1
47d5b0e70fSEmmanuel Vadot #define IMX8MP_HDMIBLK_PD_PAI				2
48d5b0e70fSEmmanuel Vadot #define IMX8MP_HDMIBLK_PD_PVI				3
49d5b0e70fSEmmanuel Vadot #define IMX8MP_HDMIBLK_PD_TRNG				4
50d5b0e70fSEmmanuel Vadot #define IMX8MP_HDMIBLK_PD_HDMI_TX			5
51d5b0e70fSEmmanuel Vadot #define IMX8MP_HDMIBLK_PD_HDMI_TX_PHY			6
52*7ef62cebSEmmanuel Vadot #define IMX8MP_HDMIBLK_PD_HDCP				7
53*7ef62cebSEmmanuel Vadot #define IMX8MP_HDMIBLK_PD_HRV				8
54*7ef62cebSEmmanuel Vadot 
55*7ef62cebSEmmanuel Vadot #define IMX8MP_VPUBLK_PD_G1				0
56*7ef62cebSEmmanuel Vadot #define IMX8MP_VPUBLK_PD_G2				1
57*7ef62cebSEmmanuel Vadot #define IMX8MP_VPUBLK_PD_VC8000E			2
58d5b0e70fSEmmanuel Vadot 
59c9ccf3a3SEmmanuel Vadot #endif
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