xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/pinctrl/pinctrl-sg2042.h (revision 8ccc0d235c226d84112561d453c49904398d085c)
1*8ccc0d23SEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
2*8ccc0d23SEmmanuel Vadot /*
3*8ccc0d23SEmmanuel Vadot  * Copyright (C) 2024 Inochi Amaoto <inochiama@outlook.com>
4*8ccc0d23SEmmanuel Vadot  *
5*8ccc0d23SEmmanuel Vadot  */
6*8ccc0d23SEmmanuel Vadot 
7*8ccc0d23SEmmanuel Vadot #ifndef _DT_BINDINGS_PINCTRL_SG2042_H
8*8ccc0d23SEmmanuel Vadot #define _DT_BINDINGS_PINCTRL_SG2042_H
9*8ccc0d23SEmmanuel Vadot 
10*8ccc0d23SEmmanuel Vadot #define PINMUX(pin, mux) \
11*8ccc0d23SEmmanuel Vadot 	(((pin) & 0xffff) | (((mux) & 0xff) << 16))
12*8ccc0d23SEmmanuel Vadot 
13*8ccc0d23SEmmanuel Vadot #define PIN_LPC_LCLK			0
14*8ccc0d23SEmmanuel Vadot #define PIN_LPC_LFRAME			1
15*8ccc0d23SEmmanuel Vadot #define PIN_LPC_LAD0			2
16*8ccc0d23SEmmanuel Vadot #define PIN_LPC_LAD1			3
17*8ccc0d23SEmmanuel Vadot #define PIN_LPC_LAD2			4
18*8ccc0d23SEmmanuel Vadot #define PIN_LPC_LAD3			5
19*8ccc0d23SEmmanuel Vadot #define PIN_LPC_LDRQ0			6
20*8ccc0d23SEmmanuel Vadot #define PIN_LPC_LDRQ1			7
21*8ccc0d23SEmmanuel Vadot #define PIN_LPC_SERIRQ			8
22*8ccc0d23SEmmanuel Vadot #define PIN_LPC_CLKRUN			9
23*8ccc0d23SEmmanuel Vadot #define PIN_LPC_LPME			10
24*8ccc0d23SEmmanuel Vadot #define PIN_LPC_LPCPD			11
25*8ccc0d23SEmmanuel Vadot #define PIN_LPC_LSMI			12
26*8ccc0d23SEmmanuel Vadot #define PIN_PCIE0_L0_RESET		13
27*8ccc0d23SEmmanuel Vadot #define PIN_PCIE0_L1_RESET		14
28*8ccc0d23SEmmanuel Vadot #define PIN_PCIE0_L0_WAKEUP		15
29*8ccc0d23SEmmanuel Vadot #define PIN_PCIE0_L1_WAKEUP		16
30*8ccc0d23SEmmanuel Vadot #define PIN_PCIE0_L0_CLKREQ_IN		17
31*8ccc0d23SEmmanuel Vadot #define PIN_PCIE0_L1_CLKREQ_IN		18
32*8ccc0d23SEmmanuel Vadot #define PIN_PCIE1_L0_RESET		19
33*8ccc0d23SEmmanuel Vadot #define PIN_PCIE1_L1_RESET		20
34*8ccc0d23SEmmanuel Vadot #define PIN_PCIE1_L0_WAKEUP		21
35*8ccc0d23SEmmanuel Vadot #define PIN_PCIE1_L1_WAKEUP		22
36*8ccc0d23SEmmanuel Vadot #define PIN_PCIE1_L0_CLKREQ_IN		23
37*8ccc0d23SEmmanuel Vadot #define PIN_PCIE1_L1_CLKREQ_IN		24
38*8ccc0d23SEmmanuel Vadot #define PIN_SPIF0_CLK_SEL1		25
39*8ccc0d23SEmmanuel Vadot #define PIN_SPIF0_CLK_SEL0		26
40*8ccc0d23SEmmanuel Vadot #define PIN_SPIF0_WP			27
41*8ccc0d23SEmmanuel Vadot #define PIN_SPIF0_HOLD			28
42*8ccc0d23SEmmanuel Vadot #define PIN_SPIF0_SDI			29
43*8ccc0d23SEmmanuel Vadot #define PIN_SPIF0_CS			30
44*8ccc0d23SEmmanuel Vadot #define PIN_SPIF0_SCK			31
45*8ccc0d23SEmmanuel Vadot #define PIN_SPIF0_SDO			32
46*8ccc0d23SEmmanuel Vadot #define PIN_SPIF1_CLK_SEL1		33
47*8ccc0d23SEmmanuel Vadot #define PIN_SPIF1_CLK_SEL0		34
48*8ccc0d23SEmmanuel Vadot #define PIN_SPIF1_WP			35
49*8ccc0d23SEmmanuel Vadot #define PIN_SPIF1_HOLD			36
50*8ccc0d23SEmmanuel Vadot #define PIN_SPIF1_SDI			37
51*8ccc0d23SEmmanuel Vadot #define PIN_SPIF1_CS			38
52*8ccc0d23SEmmanuel Vadot #define PIN_SPIF1_SCK			39
53*8ccc0d23SEmmanuel Vadot #define PIN_SPIF1_SDO			40
54*8ccc0d23SEmmanuel Vadot #define PIN_EMMC_WP			41
55*8ccc0d23SEmmanuel Vadot #define PIN_EMMC_CD			42
56*8ccc0d23SEmmanuel Vadot #define PIN_EMMC_RST			43
57*8ccc0d23SEmmanuel Vadot #define PIN_EMMC_PWR_EN			44
58*8ccc0d23SEmmanuel Vadot #define PIN_SDIO_CD			45
59*8ccc0d23SEmmanuel Vadot #define PIN_SDIO_WP			46
60*8ccc0d23SEmmanuel Vadot #define PIN_SDIO_RST			47
61*8ccc0d23SEmmanuel Vadot #define PIN_SDIO_PWR_EN			48
62*8ccc0d23SEmmanuel Vadot #define PIN_RGMII0_TXD0			49
63*8ccc0d23SEmmanuel Vadot #define PIN_RGMII0_TXD1			50
64*8ccc0d23SEmmanuel Vadot #define PIN_RGMII0_TXD2			51
65*8ccc0d23SEmmanuel Vadot #define PIN_RGMII0_TXD3			52
66*8ccc0d23SEmmanuel Vadot #define PIN_RGMII0_TXCTRL		53
67*8ccc0d23SEmmanuel Vadot #define PIN_RGMII0_RXD0			54
68*8ccc0d23SEmmanuel Vadot #define PIN_RGMII0_RXD1			55
69*8ccc0d23SEmmanuel Vadot #define PIN_RGMII0_RXD2			56
70*8ccc0d23SEmmanuel Vadot #define PIN_RGMII0_RXD3			57
71*8ccc0d23SEmmanuel Vadot #define PIN_RGMII0_RXCTRL		58
72*8ccc0d23SEmmanuel Vadot #define PIN_RGMII0_TXC			59
73*8ccc0d23SEmmanuel Vadot #define PIN_RGMII0_RXC			60
74*8ccc0d23SEmmanuel Vadot #define PIN_RGMII0_REFCLKO		61
75*8ccc0d23SEmmanuel Vadot #define PIN_RGMII0_IRQ			62
76*8ccc0d23SEmmanuel Vadot #define PIN_RGMII0_MDC			63
77*8ccc0d23SEmmanuel Vadot #define PIN_RGMII0_MDIO			64
78*8ccc0d23SEmmanuel Vadot #define PIN_PWM0			65
79*8ccc0d23SEmmanuel Vadot #define PIN_PWM1			66
80*8ccc0d23SEmmanuel Vadot #define PIN_PWM2			67
81*8ccc0d23SEmmanuel Vadot #define PIN_PWM3			68
82*8ccc0d23SEmmanuel Vadot #define PIN_FAN0			69
83*8ccc0d23SEmmanuel Vadot #define PIN_FAN1			70
84*8ccc0d23SEmmanuel Vadot #define PIN_FAN2			71
85*8ccc0d23SEmmanuel Vadot #define PIN_FAN3			72
86*8ccc0d23SEmmanuel Vadot #define PIN_IIC0_SDA			73
87*8ccc0d23SEmmanuel Vadot #define PIN_IIC0_SCL			74
88*8ccc0d23SEmmanuel Vadot #define PIN_IIC1_SDA			75
89*8ccc0d23SEmmanuel Vadot #define PIN_IIC1_SCL			76
90*8ccc0d23SEmmanuel Vadot #define PIN_IIC2_SDA			77
91*8ccc0d23SEmmanuel Vadot #define PIN_IIC2_SCL			78
92*8ccc0d23SEmmanuel Vadot #define PIN_IIC3_SDA			79
93*8ccc0d23SEmmanuel Vadot #define PIN_IIC3_SCL			80
94*8ccc0d23SEmmanuel Vadot #define PIN_UART0_TX			81
95*8ccc0d23SEmmanuel Vadot #define PIN_UART0_RX			82
96*8ccc0d23SEmmanuel Vadot #define PIN_UART0_RTS			83
97*8ccc0d23SEmmanuel Vadot #define PIN_UART0_CTS			84
98*8ccc0d23SEmmanuel Vadot #define PIN_UART1_TX			85
99*8ccc0d23SEmmanuel Vadot #define PIN_UART1_RX			86
100*8ccc0d23SEmmanuel Vadot #define PIN_UART1_RTS			87
101*8ccc0d23SEmmanuel Vadot #define PIN_UART1_CTS			88
102*8ccc0d23SEmmanuel Vadot #define PIN_UART2_TX			89
103*8ccc0d23SEmmanuel Vadot #define PIN_UART2_RX			90
104*8ccc0d23SEmmanuel Vadot #define PIN_UART2_RTS			91
105*8ccc0d23SEmmanuel Vadot #define PIN_UART2_CTS			92
106*8ccc0d23SEmmanuel Vadot #define PIN_UART3_TX			93
107*8ccc0d23SEmmanuel Vadot #define PIN_UART3_RX			94
108*8ccc0d23SEmmanuel Vadot #define PIN_UART3_RTS			95
109*8ccc0d23SEmmanuel Vadot #define PIN_UART3_CTS			96
110*8ccc0d23SEmmanuel Vadot #define PIN_SPI0_CS0			97
111*8ccc0d23SEmmanuel Vadot #define PIN_SPI0_CS1			98
112*8ccc0d23SEmmanuel Vadot #define PIN_SPI0_SDI			99
113*8ccc0d23SEmmanuel Vadot #define PIN_SPI0_SDO			100
114*8ccc0d23SEmmanuel Vadot #define PIN_SPI0_SCK			101
115*8ccc0d23SEmmanuel Vadot #define PIN_SPI1_CS0			102
116*8ccc0d23SEmmanuel Vadot #define PIN_SPI1_CS1			103
117*8ccc0d23SEmmanuel Vadot #define PIN_SPI1_SDI			104
118*8ccc0d23SEmmanuel Vadot #define PIN_SPI1_SDO			105
119*8ccc0d23SEmmanuel Vadot #define PIN_SPI1_SCK			106
120*8ccc0d23SEmmanuel Vadot #define PIN_JTAG0_TDO			107
121*8ccc0d23SEmmanuel Vadot #define PIN_JTAG0_TCK			108
122*8ccc0d23SEmmanuel Vadot #define PIN_JTAG0_TDI			109
123*8ccc0d23SEmmanuel Vadot #define PIN_JTAG0_TMS			110
124*8ccc0d23SEmmanuel Vadot #define PIN_JTAG0_TRST			111
125*8ccc0d23SEmmanuel Vadot #define PIN_JTAG0_SRST			112
126*8ccc0d23SEmmanuel Vadot #define PIN_JTAG1_TDO			113
127*8ccc0d23SEmmanuel Vadot #define PIN_JTAG1_TCK			114
128*8ccc0d23SEmmanuel Vadot #define PIN_JTAG1_TDI			115
129*8ccc0d23SEmmanuel Vadot #define PIN_JTAG1_TMS			116
130*8ccc0d23SEmmanuel Vadot #define PIN_JTAG1_TRST			117
131*8ccc0d23SEmmanuel Vadot #define PIN_JTAG1_SRST			118
132*8ccc0d23SEmmanuel Vadot #define PIN_JTAG2_TDO			119
133*8ccc0d23SEmmanuel Vadot #define PIN_JTAG2_TCK			120
134*8ccc0d23SEmmanuel Vadot #define PIN_JTAG2_TDI			121
135*8ccc0d23SEmmanuel Vadot #define PIN_JTAG2_TMS			122
136*8ccc0d23SEmmanuel Vadot #define PIN_JTAG2_TRST			123
137*8ccc0d23SEmmanuel Vadot #define PIN_JTAG2_SRST			124
138*8ccc0d23SEmmanuel Vadot #define PIN_GPIO0			125
139*8ccc0d23SEmmanuel Vadot #define PIN_GPIO1			126
140*8ccc0d23SEmmanuel Vadot #define PIN_GPIO2			127
141*8ccc0d23SEmmanuel Vadot #define PIN_GPIO3			128
142*8ccc0d23SEmmanuel Vadot #define PIN_GPIO4			129
143*8ccc0d23SEmmanuel Vadot #define PIN_GPIO5			130
144*8ccc0d23SEmmanuel Vadot #define PIN_GPIO6			131
145*8ccc0d23SEmmanuel Vadot #define PIN_GPIO7			132
146*8ccc0d23SEmmanuel Vadot #define PIN_GPIO8			133
147*8ccc0d23SEmmanuel Vadot #define PIN_GPIO9			134
148*8ccc0d23SEmmanuel Vadot #define PIN_GPIO10			135
149*8ccc0d23SEmmanuel Vadot #define PIN_GPIO11			136
150*8ccc0d23SEmmanuel Vadot #define PIN_GPIO12			137
151*8ccc0d23SEmmanuel Vadot #define PIN_GPIO13			138
152*8ccc0d23SEmmanuel Vadot #define PIN_GPIO14			139
153*8ccc0d23SEmmanuel Vadot #define PIN_GPIO15			140
154*8ccc0d23SEmmanuel Vadot #define PIN_GPIO16			141
155*8ccc0d23SEmmanuel Vadot #define PIN_GPIO17			142
156*8ccc0d23SEmmanuel Vadot #define PIN_GPIO18			143
157*8ccc0d23SEmmanuel Vadot #define PIN_GPIO19			144
158*8ccc0d23SEmmanuel Vadot #define PIN_GPIO20			145
159*8ccc0d23SEmmanuel Vadot #define PIN_GPIO21			146
160*8ccc0d23SEmmanuel Vadot #define PIN_GPIO22			147
161*8ccc0d23SEmmanuel Vadot #define PIN_GPIO23			148
162*8ccc0d23SEmmanuel Vadot #define PIN_GPIO24			149
163*8ccc0d23SEmmanuel Vadot #define PIN_GPIO25			150
164*8ccc0d23SEmmanuel Vadot #define PIN_GPIO26			151
165*8ccc0d23SEmmanuel Vadot #define PIN_GPIO27			152
166*8ccc0d23SEmmanuel Vadot #define PIN_GPIO28			153
167*8ccc0d23SEmmanuel Vadot #define PIN_GPIO29			154
168*8ccc0d23SEmmanuel Vadot #define PIN_GPIO30			155
169*8ccc0d23SEmmanuel Vadot #define PIN_GPIO31			156
170*8ccc0d23SEmmanuel Vadot #define PIN_MODE_SEL0			157
171*8ccc0d23SEmmanuel Vadot #define PIN_MODE_SEL1			158
172*8ccc0d23SEmmanuel Vadot #define PIN_MODE_SEL2			159
173*8ccc0d23SEmmanuel Vadot #define PIN_BOOT_SEL0			160
174*8ccc0d23SEmmanuel Vadot #define PIN_BOOT_SEL1			161
175*8ccc0d23SEmmanuel Vadot #define PIN_BOOT_SEL2			162
176*8ccc0d23SEmmanuel Vadot #define PIN_BOOT_SEL3			163
177*8ccc0d23SEmmanuel Vadot #define PIN_BOOT_SEL4			164
178*8ccc0d23SEmmanuel Vadot #define PIN_BOOT_SEL5			165
179*8ccc0d23SEmmanuel Vadot #define PIN_BOOT_SEL6			166
180*8ccc0d23SEmmanuel Vadot #define PIN_BOOT_SEL7			167
181*8ccc0d23SEmmanuel Vadot #define PIN_MULTI_SCKT			168
182*8ccc0d23SEmmanuel Vadot #define PIN_SCKT_ID0			169
183*8ccc0d23SEmmanuel Vadot #define PIN_SCKT_ID1			170
184*8ccc0d23SEmmanuel Vadot #define PIN_PLL_CLK_IN_MAIN		171
185*8ccc0d23SEmmanuel Vadot #define PIN_PLL_CLK_IN_DDR_L		172
186*8ccc0d23SEmmanuel Vadot #define PIN_PLL_CLK_IN_DDR_R		173
187*8ccc0d23SEmmanuel Vadot #define PIN_XTAL_32K			174
188*8ccc0d23SEmmanuel Vadot #define PIN_SYS_RST			175
189*8ccc0d23SEmmanuel Vadot #define PIN_PWR_BUTTON			176
190*8ccc0d23SEmmanuel Vadot #define PIN_TEST_EN			177
191*8ccc0d23SEmmanuel Vadot #define PIN_TEST_MODE_MBIST		178
192*8ccc0d23SEmmanuel Vadot #define PIN_TEST_MODE_SCAN		179
193*8ccc0d23SEmmanuel Vadot #define PIN_TEST_MODE_BSD		180
194*8ccc0d23SEmmanuel Vadot #define PIN_BISR_BYP			181
195*8ccc0d23SEmmanuel Vadot 
196*8ccc0d23SEmmanuel Vadot #endif /* _DT_BINDINGS_PINCTRL_SG2042_H */
197