xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/pinctrl/hisi.h (revision 5ca8e32633c4ffbbcd6762e5888b6a4ba0708c6c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * This header provides constants for hisilicon pinctrl bindings.
4  *
5  * Copyright (c) 2015 HiSilicon Limited.
6  * Copyright (c) 2015 Linaro Limited.
7  */
8 
9 #ifndef _DT_BINDINGS_PINCTRL_HISI_H
10 #define _DT_BINDINGS_PINCTRL_HISI_H
11 
12 /* iomg bit definition */
13 #define MUX_M0		0
14 #define MUX_M1		1
15 #define MUX_M2		2
16 #define MUX_M3		3
17 #define MUX_M4		4
18 #define MUX_M5		5
19 #define MUX_M6		6
20 #define MUX_M7		7
21 
22 /* iocg bit definition */
23 #define PULL_MASK	(3)
24 #define PULL_DIS	(0)
25 #define PULL_UP		(1 << 0)
26 #define PULL_DOWN	(1 << 1)
27 
28 /* drive strength definition */
29 #define DRIVE_MASK	(7 << 4)
30 #define DRIVE1_02MA	(0 << 4)
31 #define DRIVE1_04MA	(1 << 4)
32 #define DRIVE1_08MA	(2 << 4)
33 #define DRIVE1_10MA	(3 << 4)
34 #define DRIVE2_02MA	(0 << 4)
35 #define DRIVE2_04MA	(1 << 4)
36 #define DRIVE2_08MA	(2 << 4)
37 #define DRIVE2_10MA	(3 << 4)
38 #define DRIVE3_04MA	(0 << 4)
39 #define DRIVE3_08MA	(1 << 4)
40 #define DRIVE3_12MA	(2 << 4)
41 #define DRIVE3_16MA	(3 << 4)
42 #define DRIVE3_20MA	(4 << 4)
43 #define DRIVE3_24MA	(5 << 4)
44 #define DRIVE3_32MA	(6 << 4)
45 #define DRIVE3_40MA	(7 << 4)
46 #define DRIVE4_02MA	(0 << 4)
47 #define DRIVE4_04MA	(2 << 4)
48 #define DRIVE4_08MA	(4 << 4)
49 #define DRIVE4_10MA	(6 << 4)
50 
51 /* drive strength definition for hi3660 */
52 #define DRIVE6_MASK	(15 << 4)
53 #define DRIVE6_04MA	(0 << 4)
54 #define DRIVE6_12MA	(4 << 4)
55 #define DRIVE6_19MA	(8 << 4)
56 #define DRIVE6_27MA	(10 << 4)
57 #define DRIVE6_32MA	(15 << 4)
58 #define DRIVE7_02MA	(0 << 4)
59 #define DRIVE7_04MA	(1 << 4)
60 #define DRIVE7_06MA	(2 << 4)
61 #define DRIVE7_08MA	(3 << 4)
62 #define DRIVE7_10MA	(4 << 4)
63 #define DRIVE7_12MA	(5 << 4)
64 #define DRIVE7_14MA	(6 << 4)
65 #define DRIVE7_16MA	(7 << 4)
66 #endif
67