xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/mfd/dbx500-prcmu.h (revision ec0ea6efa1ad229d75c394c1a9b9cac33af2b1d3)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * This header provides constants for the PRCMU bindings.
4  *
5  */
6 
7 #ifndef _DT_BINDINGS_MFD_PRCMU_H
8 #define _DT_BINDINGS_MFD_PRCMU_H
9 
10 /*
11  * Clock identifiers.
12  */
13 #define ARMCLK			0
14 #define PRCMU_ACLK		1
15 #define PRCMU_SVAMMCSPCLK 	2
16 #define PRCMU_SDMMCHCLK 	2  /* DBx540 only. */
17 #define PRCMU_SIACLK 		3
18 #define PRCMU_SIAMMDSPCLK 	3  /* DBx540 only. */
19 #define PRCMU_SGACLK 		4
20 #define PRCMU_UARTCLK 		5
21 #define PRCMU_MSP02CLK 		6
22 #define PRCMU_MSP1CLK 		7
23 #define PRCMU_I2CCLK 		8
24 #define PRCMU_SDMMCCLK 		9
25 #define PRCMU_SLIMCLK 		10
26 #define PRCMU_CAMCLK 		10 /* DBx540 only. */
27 #define PRCMU_PER1CLK 		11
28 #define PRCMU_PER2CLK 		12
29 #define PRCMU_PER3CLK 		13
30 #define PRCMU_PER5CLK 		14
31 #define PRCMU_PER6CLK 		15
32 #define PRCMU_PER7CLK 		16
33 #define PRCMU_LCDCLK 		17
34 #define PRCMU_BMLCLK 		18
35 #define PRCMU_HSITXCLK 		19
36 #define PRCMU_HSIRXCLK 		20
37 #define PRCMU_HDMICLK		21
38 #define PRCMU_APEATCLK 		22
39 #define PRCMU_APETRACECLK 	23
40 #define PRCMU_MCDECLK  	 	24
41 #define PRCMU_IPI2CCLK  	25
42 #define PRCMU_DSIALTCLK  	26
43 #define PRCMU_DMACLK  	 	27
44 #define PRCMU_B2R2CLK  	 	28
45 #define PRCMU_TVCLK  	 	29
46 #define SPARE_UNIPROCLK  	30
47 #define PRCMU_SSPCLK  	 	31
48 #define PRCMU_RNGCLK  	 	32
49 #define PRCMU_UICCCLK  	 	33
50 #define PRCMU_G1CLK             34 /* DBx540 only. */
51 #define PRCMU_HVACLK            35 /* DBx540 only. */
52 #define PRCMU_SPARE1CLK	 	36
53 #define PRCMU_SPARE2CLK	 	37
54 
55 #define PRCMU_NUM_REG_CLOCKS  	38
56 
57 #define PRCMU_RTCCLK  	 	PRCMU_NUM_REG_CLOCKS
58 #define PRCMU_SYSCLK  	 	39
59 #define PRCMU_CDCLK  	 	40
60 #define PRCMU_TIMCLK  	 	41
61 #define PRCMU_PLLSOC0  	 	42
62 #define PRCMU_PLLSOC1  	 	43
63 #define PRCMU_ARMSS  	 	44
64 #define PRCMU_PLLDDR  	 	45
65 
66 /* DSI Clocks */
67 #define PRCMU_PLLDSI  	 	46
68 #define PRCMU_DSI0CLK 	  	47
69 #define PRCMU_DSI1CLK  	 	48
70 #define PRCMU_DSI0ESCCLK  	49
71 #define PRCMU_DSI1ESCCLK  	50
72 #define PRCMU_DSI2ESCCLK  	51
73 
74 /* LCD DSI PLL - Ux540 only */
75 #define PRCMU_PLLDSI_LCD        52
76 #define PRCMU_DSI0CLK_LCD       53
77 #define PRCMU_DSI1CLK_LCD       54
78 #define PRCMU_DSI0ESCCLK_LCD    55
79 #define PRCMU_DSI1ESCCLK_LCD    56
80 #define PRCMU_DSI2ESCCLK_LCD    57
81 
82 #define PRCMU_NUM_CLKS  	58
83 
84 #endif
85