xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/mfd/dbx500-prcmu.h (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */
2*c66ec88fSEmmanuel Vadot /*
3*c66ec88fSEmmanuel Vadot  * This header provides constants for the PRCMU bindings.
4*c66ec88fSEmmanuel Vadot  *
5*c66ec88fSEmmanuel Vadot  */
6*c66ec88fSEmmanuel Vadot 
7*c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_MFD_PRCMU_H
8*c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_MFD_PRCMU_H
9*c66ec88fSEmmanuel Vadot 
10*c66ec88fSEmmanuel Vadot /*
11*c66ec88fSEmmanuel Vadot  * Clock identifiers.
12*c66ec88fSEmmanuel Vadot  */
13*c66ec88fSEmmanuel Vadot #define ARMCLK			0
14*c66ec88fSEmmanuel Vadot #define PRCMU_ACLK		1
15*c66ec88fSEmmanuel Vadot #define PRCMU_SVAMMCSPCLK 	2
16*c66ec88fSEmmanuel Vadot #define PRCMU_SDMMCHCLK 	2  /* DBx540 only. */
17*c66ec88fSEmmanuel Vadot #define PRCMU_SIACLK 		3
18*c66ec88fSEmmanuel Vadot #define PRCMU_SIAMMDSPCLK 	3  /* DBx540 only. */
19*c66ec88fSEmmanuel Vadot #define PRCMU_SGACLK 		4
20*c66ec88fSEmmanuel Vadot #define PRCMU_UARTCLK 		5
21*c66ec88fSEmmanuel Vadot #define PRCMU_MSP02CLK 		6
22*c66ec88fSEmmanuel Vadot #define PRCMU_MSP1CLK 		7
23*c66ec88fSEmmanuel Vadot #define PRCMU_I2CCLK 		8
24*c66ec88fSEmmanuel Vadot #define PRCMU_SDMMCCLK 		9
25*c66ec88fSEmmanuel Vadot #define PRCMU_SLIMCLK 		10
26*c66ec88fSEmmanuel Vadot #define PRCMU_CAMCLK 		10 /* DBx540 only. */
27*c66ec88fSEmmanuel Vadot #define PRCMU_PER1CLK 		11
28*c66ec88fSEmmanuel Vadot #define PRCMU_PER2CLK 		12
29*c66ec88fSEmmanuel Vadot #define PRCMU_PER3CLK 		13
30*c66ec88fSEmmanuel Vadot #define PRCMU_PER5CLK 		14
31*c66ec88fSEmmanuel Vadot #define PRCMU_PER6CLK 		15
32*c66ec88fSEmmanuel Vadot #define PRCMU_PER7CLK 		16
33*c66ec88fSEmmanuel Vadot #define PRCMU_LCDCLK 		17
34*c66ec88fSEmmanuel Vadot #define PRCMU_BMLCLK 		18
35*c66ec88fSEmmanuel Vadot #define PRCMU_HSITXCLK 		19
36*c66ec88fSEmmanuel Vadot #define PRCMU_HSIRXCLK 		20
37*c66ec88fSEmmanuel Vadot #define PRCMU_HDMICLK		21
38*c66ec88fSEmmanuel Vadot #define PRCMU_APEATCLK 		22
39*c66ec88fSEmmanuel Vadot #define PRCMU_APETRACECLK 	23
40*c66ec88fSEmmanuel Vadot #define PRCMU_MCDECLK  	 	24
41*c66ec88fSEmmanuel Vadot #define PRCMU_IPI2CCLK  	25
42*c66ec88fSEmmanuel Vadot #define PRCMU_DSIALTCLK  	26
43*c66ec88fSEmmanuel Vadot #define PRCMU_DMACLK  	 	27
44*c66ec88fSEmmanuel Vadot #define PRCMU_B2R2CLK  	 	28
45*c66ec88fSEmmanuel Vadot #define PRCMU_TVCLK  	 	29
46*c66ec88fSEmmanuel Vadot #define SPARE_UNIPROCLK  	30
47*c66ec88fSEmmanuel Vadot #define PRCMU_SSPCLK  	 	31
48*c66ec88fSEmmanuel Vadot #define PRCMU_RNGCLK  	 	32
49*c66ec88fSEmmanuel Vadot #define PRCMU_UICCCLK  	 	33
50*c66ec88fSEmmanuel Vadot #define PRCMU_G1CLK             34 /* DBx540 only. */
51*c66ec88fSEmmanuel Vadot #define PRCMU_HVACLK            35 /* DBx540 only. */
52*c66ec88fSEmmanuel Vadot #define PRCMU_SPARE1CLK	 	36
53*c66ec88fSEmmanuel Vadot #define PRCMU_SPARE2CLK	 	37
54*c66ec88fSEmmanuel Vadot 
55*c66ec88fSEmmanuel Vadot #define PRCMU_NUM_REG_CLOCKS  	38
56*c66ec88fSEmmanuel Vadot 
57*c66ec88fSEmmanuel Vadot #define PRCMU_RTCCLK  	 	PRCMU_NUM_REG_CLOCKS
58*c66ec88fSEmmanuel Vadot #define PRCMU_SYSCLK  	 	39
59*c66ec88fSEmmanuel Vadot #define PRCMU_CDCLK  	 	40
60*c66ec88fSEmmanuel Vadot #define PRCMU_TIMCLK  	 	41
61*c66ec88fSEmmanuel Vadot #define PRCMU_PLLSOC0  	 	42
62*c66ec88fSEmmanuel Vadot #define PRCMU_PLLSOC1  	 	43
63*c66ec88fSEmmanuel Vadot #define PRCMU_ARMSS  	 	44
64*c66ec88fSEmmanuel Vadot #define PRCMU_PLLDDR  	 	45
65*c66ec88fSEmmanuel Vadot 
66*c66ec88fSEmmanuel Vadot /* DSI Clocks */
67*c66ec88fSEmmanuel Vadot #define PRCMU_PLLDSI  	 	46
68*c66ec88fSEmmanuel Vadot #define PRCMU_DSI0CLK 	  	47
69*c66ec88fSEmmanuel Vadot #define PRCMU_DSI1CLK  	 	48
70*c66ec88fSEmmanuel Vadot #define PRCMU_DSI0ESCCLK  	49
71*c66ec88fSEmmanuel Vadot #define PRCMU_DSI1ESCCLK  	50
72*c66ec88fSEmmanuel Vadot #define PRCMU_DSI2ESCCLK  	51
73*c66ec88fSEmmanuel Vadot 
74*c66ec88fSEmmanuel Vadot /* LCD DSI PLL - Ux540 only */
75*c66ec88fSEmmanuel Vadot #define PRCMU_PLLDSI_LCD        52
76*c66ec88fSEmmanuel Vadot #define PRCMU_DSI0CLK_LCD       53
77*c66ec88fSEmmanuel Vadot #define PRCMU_DSI1CLK_LCD       54
78*c66ec88fSEmmanuel Vadot #define PRCMU_DSI0ESCCLK_LCD    55
79*c66ec88fSEmmanuel Vadot #define PRCMU_DSI1ESCCLK_LCD    56
80*c66ec88fSEmmanuel Vadot #define PRCMU_DSI2ESCCLK_LCD    57
81*c66ec88fSEmmanuel Vadot 
82*c66ec88fSEmmanuel Vadot #define PRCMU_NUM_CLKS  	58
83*c66ec88fSEmmanuel Vadot 
84*c66ec88fSEmmanuel Vadot #endif
85