1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Qualcomm SDM845 interconnect IDs 4 * 5 * Copyright (c) 2018, Linaro Ltd. 6 * Author: Georgi Djakov <georgi.djakov@linaro.org> 7 */ 8 9 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDM845_H 10 #define __DT_BINDINGS_INTERCONNECT_QCOM_SDM845_H 11 12 #define MASTER_A1NOC_CFG 0 13 #define MASTER_TSIF 1 14 #define MASTER_SDCC_2 2 15 #define MASTER_SDCC_4 3 16 #define MASTER_UFS_CARD 4 17 #define MASTER_UFS_MEM 5 18 #define MASTER_PCIE_0 6 19 #define SLAVE_A1NOC_SNOC 7 20 #define SLAVE_SERVICE_A1NOC 8 21 #define SLAVE_ANOC_PCIE_A1NOC_SNOC 9 22 #define MASTER_QUP_1 10 23 24 #define MASTER_A2NOC_CFG 0 25 #define MASTER_QDSS_BAM 1 26 #define MASTER_CNOC_A2NOC 2 27 #define MASTER_CRYPTO 3 28 #define MASTER_IPA 4 29 #define MASTER_PCIE_1 5 30 #define MASTER_QDSS_ETR 6 31 #define MASTER_USB3_0 7 32 #define MASTER_USB3_1 8 33 #define SLAVE_A2NOC_SNOC 9 34 #define SLAVE_ANOC_PCIE_SNOC 10 35 #define SLAVE_SERVICE_A2NOC 11 36 #define MASTER_QUP_2 12 37 38 #define MASTER_SPDM 0 39 #define MASTER_TIC 1 40 #define MASTER_SNOC_CNOC 2 41 #define MASTER_QDSS_DAP 3 42 #define SLAVE_A1NOC_CFG 4 43 #define SLAVE_A2NOC_CFG 5 44 #define SLAVE_AOP 6 45 #define SLAVE_AOSS 7 46 #define SLAVE_CAMERA_CFG 8 47 #define SLAVE_CLK_CTL 9 48 #define SLAVE_CDSP_CFG 10 49 #define SLAVE_RBCPR_CX_CFG 11 50 #define SLAVE_CRYPTO_0_CFG 12 51 #define SLAVE_DCC_CFG 13 52 #define SLAVE_CNOC_DDRSS 14 53 #define SLAVE_DISPLAY_CFG 15 54 #define SLAVE_GLM 16 55 #define SLAVE_GFX3D_CFG 17 56 #define SLAVE_IMEM_CFG 18 57 #define SLAVE_IPA_CFG 19 58 #define SLAVE_CNOC_MNOC_CFG 20 59 #define SLAVE_PCIE_0_CFG 21 60 #define SLAVE_PCIE_1_CFG 22 61 #define SLAVE_PDM 23 62 #define SLAVE_SOUTH_PHY_CFG 24 63 #define SLAVE_PIMEM_CFG 25 64 #define SLAVE_PRNG 26 65 #define SLAVE_QDSS_CFG 27 66 #define SLAVE_BLSP_2 28 67 #define SLAVE_BLSP_1 29 68 #define SLAVE_SDCC_2 30 69 #define SLAVE_SDCC_4 31 70 #define SLAVE_SNOC_CFG 32 71 #define SLAVE_SPDM_WRAPPER 33 72 #define SLAVE_SPSS_CFG 34 73 #define SLAVE_TCSR 35 74 #define SLAVE_TLMM_NORTH 36 75 #define SLAVE_TLMM_SOUTH 37 76 #define SLAVE_TSIF 38 77 #define SLAVE_UFS_CARD_CFG 39 78 #define SLAVE_UFS_MEM_CFG 40 79 #define SLAVE_USB3_0 41 80 #define SLAVE_USB3_1 42 81 #define SLAVE_VENUS_CFG 43 82 #define SLAVE_VSENSE_CTRL_CFG 44 83 #define SLAVE_CNOC_A2NOC 45 84 #define SLAVE_SERVICE_CNOC 46 85 86 #define MASTER_CNOC_DC_NOC 0 87 #define SLAVE_LLCC_CFG 1 88 #define SLAVE_MEM_NOC_CFG 2 89 90 #define MASTER_APPSS_PROC 0 91 #define MASTER_GNOC_CFG 1 92 #define SLAVE_GNOC_SNOC 2 93 #define SLAVE_GNOC_MEM_NOC 3 94 #define SLAVE_SERVICE_GNOC 4 95 96 #define MASTER_TCU_0 0 97 #define MASTER_MEM_NOC_CFG 1 98 #define MASTER_GNOC_MEM_NOC 2 99 #define MASTER_MNOC_HF_MEM_NOC 3 100 #define MASTER_MNOC_SF_MEM_NOC 4 101 #define MASTER_SNOC_GC_MEM_NOC 5 102 #define MASTER_SNOC_SF_MEM_NOC 6 103 #define MASTER_GFX3D 7 104 #define SLAVE_MSS_PROC_MS_MPU_CFG 8 105 #define SLAVE_MEM_NOC_GNOC 9 106 #define SLAVE_LLCC 10 107 #define SLAVE_MEM_NOC_SNOC 11 108 #define SLAVE_SERVICE_MEM_NOC 12 109 #define MASTER_LLCC 13 110 #define SLAVE_EBI1 14 111 112 #define MASTER_CNOC_MNOC_CFG 0 113 #define MASTER_CAMNOC_HF0 1 114 #define MASTER_CAMNOC_HF1 2 115 #define MASTER_CAMNOC_SF 3 116 #define MASTER_MDP0 4 117 #define MASTER_MDP1 5 118 #define MASTER_ROTATOR 6 119 #define MASTER_VIDEO_P0 7 120 #define MASTER_VIDEO_P1 8 121 #define MASTER_VIDEO_PROC 9 122 #define SLAVE_MNOC_SF_MEM_NOC 10 123 #define SLAVE_MNOC_HF_MEM_NOC 11 124 #define SLAVE_SERVICE_MNOC 12 125 #define MASTER_CAMNOC_HF0_UNCOMP 13 126 #define MASTER_CAMNOC_HF1_UNCOMP 14 127 #define MASTER_CAMNOC_SF_UNCOMP 15 128 #define SLAVE_CAMNOC_UNCOMP 16 129 130 #define MASTER_SNOC_CFG 0 131 #define MASTER_A1NOC_SNOC 1 132 #define MASTER_A2NOC_SNOC 2 133 #define MASTER_GNOC_SNOC 3 134 #define MASTER_MEM_NOC_SNOC 4 135 #define MASTER_ANOC_PCIE_SNOC 5 136 #define MASTER_PIMEM 6 137 #define MASTER_GIC 7 138 #define SLAVE_APPSS 8 139 #define SLAVE_SNOC_CNOC 9 140 #define SLAVE_SNOC_MEM_NOC_GC 10 141 #define SLAVE_SNOC_MEM_NOC_SF 11 142 #define SLAVE_IMEM 12 143 #define SLAVE_PCIE_0 13 144 #define SLAVE_PCIE_1 14 145 #define SLAVE_PIMEM 15 146 #define SLAVE_SERVICE_SNOC 16 147 #define SLAVE_QDSS_STM 17 148 #define SLAVE_TCU 18 149 150 #endif 151