1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Qualcomm SC7280 interconnect IDs 4 * 5 * Copyright (c) 2021, The Linux Foundation. All rights reserved. 6 */ 7 8 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SC7280_H 9 #define __DT_BINDINGS_INTERCONNECT_QCOM_SC7280_H 10 11 #define MASTER_QSPI_0 0 12 #define MASTER_QUP_0 1 13 #define MASTER_QUP_1 2 14 #define MASTER_A1NOC_CFG 3 15 #define MASTER_PCIE_0 4 16 #define MASTER_PCIE_1 5 17 #define MASTER_SDCC_1 6 18 #define MASTER_SDCC_2 7 19 #define MASTER_SDCC_4 8 20 #define MASTER_UFS_MEM 9 21 #define MASTER_USB2 10 22 #define MASTER_USB3_0 11 23 #define SLAVE_A1NOC_SNOC 12 24 #define SLAVE_ANOC_PCIE_GEM_NOC 13 25 #define SLAVE_SERVICE_A1NOC 14 26 27 #define MASTER_QDSS_BAM 0 28 #define MASTER_A2NOC_CFG 1 29 #define MASTER_CNOC_A2NOC 2 30 #define MASTER_CRYPTO 3 31 #define MASTER_IPA 4 32 #define MASTER_QDSS_ETR 5 33 #define SLAVE_A2NOC_SNOC 6 34 #define SLAVE_SERVICE_A2NOC 7 35 36 #define MASTER_QUP_CORE_0 0 37 #define MASTER_QUP_CORE_1 1 38 #define SLAVE_QUP_CORE_0 2 39 #define SLAVE_QUP_CORE_1 3 40 41 #define MASTER_CNOC3_CNOC2 0 42 #define MASTER_QDSS_DAP 1 43 #define SLAVE_AHB2PHY_SOUTH 2 44 #define SLAVE_AHB2PHY_NORTH 3 45 #define SLAVE_CAMERA_CFG 4 46 #define SLAVE_CLK_CTL 5 47 #define SLAVE_CDSP_CFG 6 48 #define SLAVE_RBCPR_CX_CFG 7 49 #define SLAVE_RBCPR_MX_CFG 8 50 #define SLAVE_CRYPTO_0_CFG 9 51 #define SLAVE_CX_RDPM 10 52 #define SLAVE_DCC_CFG 11 53 #define SLAVE_DISPLAY_CFG 12 54 #define SLAVE_GFX3D_CFG 13 55 #define SLAVE_HWKM 14 56 #define SLAVE_IMEM_CFG 15 57 #define SLAVE_IPA_CFG 16 58 #define SLAVE_IPC_ROUTER_CFG 17 59 #define SLAVE_LPASS 18 60 #define SLAVE_CNOC_MSS 19 61 #define SLAVE_MX_RDPM 20 62 #define SLAVE_PCIE_0_CFG 21 63 #define SLAVE_PCIE_1_CFG 22 64 #define SLAVE_PDM 23 65 #define SLAVE_PIMEM_CFG 24 66 #define SLAVE_PKA_WRAPPER_CFG 25 67 #define SLAVE_PMU_WRAPPER_CFG 26 68 #define SLAVE_QDSS_CFG 27 69 #define SLAVE_QSPI_0 28 70 #define SLAVE_QUP_0 29 71 #define SLAVE_QUP_1 30 72 #define SLAVE_SDCC_1 31 73 #define SLAVE_SDCC_2 32 74 #define SLAVE_SDCC_4 33 75 #define SLAVE_SECURITY 34 76 #define SLAVE_TCSR 35 77 #define SLAVE_TLMM 36 78 #define SLAVE_UFS_MEM_CFG 37 79 #define SLAVE_USB2 38 80 #define SLAVE_USB3_0 39 81 #define SLAVE_VENUS_CFG 40 82 #define SLAVE_VSENSE_CTRL_CFG 41 83 #define SLAVE_A1NOC_CFG 42 84 #define SLAVE_A2NOC_CFG 43 85 #define SLAVE_CNOC2_CNOC3 44 86 #define SLAVE_CNOC_MNOC_CFG 45 87 #define SLAVE_SNOC_CFG 46 88 89 #define MASTER_CNOC2_CNOC3 0 90 #define MASTER_GEM_NOC_CNOC 1 91 #define MASTER_GEM_NOC_PCIE_SNOC 2 92 #define SLAVE_AOSS 3 93 #define SLAVE_APPSS 4 94 #define SLAVE_CNOC3_CNOC2 5 95 #define SLAVE_CNOC_A2NOC 6 96 #define SLAVE_DDRSS_CFG 7 97 #define SLAVE_BOOT_IMEM 8 98 #define SLAVE_IMEM 9 99 #define SLAVE_PIMEM 10 100 #define SLAVE_PCIE_0 11 101 #define SLAVE_PCIE_1 12 102 #define SLAVE_QDSS_STM 13 103 #define SLAVE_TCU 14 104 105 #define MASTER_CNOC_DC_NOC 0 106 #define SLAVE_LLCC_CFG 1 107 #define SLAVE_GEM_NOC_CFG 2 108 109 #define MASTER_GPU_TCU 0 110 #define MASTER_SYS_TCU 1 111 #define MASTER_APPSS_PROC 2 112 #define MASTER_COMPUTE_NOC 3 113 #define MASTER_GEM_NOC_CFG 4 114 #define MASTER_GFX3D 5 115 #define MASTER_MNOC_HF_MEM_NOC 6 116 #define MASTER_MNOC_SF_MEM_NOC 7 117 #define MASTER_ANOC_PCIE_GEM_NOC 8 118 #define MASTER_SNOC_GC_MEM_NOC 9 119 #define MASTER_SNOC_SF_MEM_NOC 10 120 #define SLAVE_MSS_PROC_MS_MPU_CFG 11 121 #define SLAVE_MCDMA_MS_MPU_CFG 12 122 #define SLAVE_GEM_NOC_CNOC 13 123 #define SLAVE_LLCC 14 124 #define SLAVE_MEM_NOC_PCIE_SNOC 15 125 #define SLAVE_SERVICE_GEM_NOC_1 16 126 #define SLAVE_SERVICE_GEM_NOC_2 17 127 #define SLAVE_SERVICE_GEM_NOC 18 128 129 #define MASTER_CNOC_LPASS_AG_NOC 0 130 #define SLAVE_LPASS_CORE_CFG 1 131 #define SLAVE_LPASS_LPI_CFG 2 132 #define SLAVE_LPASS_MPU_CFG 3 133 #define SLAVE_LPASS_TOP_CFG 4 134 #define SLAVE_SERVICES_LPASS_AML_NOC 5 135 #define SLAVE_SERVICE_LPASS_AG_NOC 6 136 137 #define MASTER_LLCC 0 138 #define SLAVE_EBI1 1 139 140 #define MASTER_CNOC_MNOC_CFG 0 141 #define MASTER_VIDEO_P0 1 142 #define MASTER_VIDEO_PROC 2 143 #define MASTER_CAMNOC_HF 3 144 #define MASTER_CAMNOC_ICP 4 145 #define MASTER_CAMNOC_SF 5 146 #define MASTER_MDP0 6 147 #define SLAVE_MNOC_HF_MEM_NOC 7 148 #define SLAVE_MNOC_SF_MEM_NOC 8 149 #define SLAVE_SERVICE_MNOC 9 150 151 #define MASTER_CDSP_NOC_CFG 0 152 #define MASTER_CDSP_PROC 1 153 #define SLAVE_CDSP_MEM_NOC 2 154 #define SLAVE_SERVICE_NSP_NOC 3 155 156 #define MASTER_A1NOC_SNOC 0 157 #define MASTER_A2NOC_SNOC 1 158 #define MASTER_SNOC_CFG 2 159 #define MASTER_PIMEM 3 160 #define MASTER_GIC 4 161 #define SLAVE_SNOC_GEM_NOC_GC 5 162 #define SLAVE_SNOC_GEM_NOC_SF 6 163 #define SLAVE_SERVICE_SNOC 7 164 165 #endif 166