1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * Interconnect framework driver for i.MX SoC 4*c66ec88fSEmmanuel Vadot * 5*c66ec88fSEmmanuel Vadot * Copyright (c) 2019-2020, NXP 6*c66ec88fSEmmanuel Vadot */ 7*c66ec88fSEmmanuel Vadot 8*c66ec88fSEmmanuel Vadot #ifndef __DT_BINDINGS_INTERCONNECT_IMX8MN_H 9*c66ec88fSEmmanuel Vadot #define __DT_BINDINGS_INTERCONNECT_IMX8MN_H 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel Vadot #define IMX8MN_ICN_NOC 1 12*c66ec88fSEmmanuel Vadot #define IMX8MN_ICS_DRAM 2 13*c66ec88fSEmmanuel Vadot #define IMX8MN_ICS_OCRAM 3 14*c66ec88fSEmmanuel Vadot #define IMX8MN_ICM_A53 4 15*c66ec88fSEmmanuel Vadot 16*c66ec88fSEmmanuel Vadot #define IMX8MN_ICM_GPU 5 17*c66ec88fSEmmanuel Vadot #define IMX8MN_ICN_GPU 6 18*c66ec88fSEmmanuel Vadot 19*c66ec88fSEmmanuel Vadot #define IMX8MN_ICM_CSI1 7 20*c66ec88fSEmmanuel Vadot #define IMX8MN_ICM_CSI2 8 21*c66ec88fSEmmanuel Vadot #define IMX8MN_ICM_ISI 9 22*c66ec88fSEmmanuel Vadot #define IMX8MN_ICM_LCDIF 10 23*c66ec88fSEmmanuel Vadot #define IMX8MN_ICN_MIPI 11 24*c66ec88fSEmmanuel Vadot 25*c66ec88fSEmmanuel Vadot #define IMX8MN_ICM_USB 12 26*c66ec88fSEmmanuel Vadot 27*c66ec88fSEmmanuel Vadot #define IMX8MN_ICM_SDMA2 13 28*c66ec88fSEmmanuel Vadot #define IMX8MN_ICM_SDMA3 14 29*c66ec88fSEmmanuel Vadot #define IMX8MN_ICN_AUDIO 15 30*c66ec88fSEmmanuel Vadot 31*c66ec88fSEmmanuel Vadot #define IMX8MN_ICN_ENET 16 32*c66ec88fSEmmanuel Vadot #define IMX8MN_ICM_ENET 17 33*c66ec88fSEmmanuel Vadot 34*c66ec88fSEmmanuel Vadot #define IMX8MN_ICM_NAND 18 35*c66ec88fSEmmanuel Vadot #define IMX8MN_ICM_SDMA1 19 36*c66ec88fSEmmanuel Vadot #define IMX8MN_ICM_USDHC1 20 37*c66ec88fSEmmanuel Vadot #define IMX8MN_ICM_USDHC2 21 38*c66ec88fSEmmanuel Vadot #define IMX8MN_ICM_USDHC3 22 39*c66ec88fSEmmanuel Vadot #define IMX8MN_ICN_MAIN 23 40*c66ec88fSEmmanuel Vadot 41*c66ec88fSEmmanuel Vadot #endif /* __DT_BINDINGS_INTERCONNECT_IMX8MN_H */ 42