1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * Copyright 2016 Maxime Ripard 4*c66ec88fSEmmanuel Vadot * 5*c66ec88fSEmmanuel Vadot * Maxime Ripard <maxime.ripard@free-electrons.com> 6*c66ec88fSEmmanuel Vadot */ 7*c66ec88fSEmmanuel Vadot 8*c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_CLK_SUN5I_H_ 9*c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_CLK_SUN5I_H_ 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel Vadot #define CLK_HOSC 1 12*c66ec88fSEmmanuel Vadot 13*c66ec88fSEmmanuel Vadot #define CLK_PLL_VIDEO0_2X 9 14*c66ec88fSEmmanuel Vadot 15*c66ec88fSEmmanuel Vadot #define CLK_PLL_VIDEO1_2X 16 16*c66ec88fSEmmanuel Vadot #define CLK_CPU 17 17*c66ec88fSEmmanuel Vadot 18*c66ec88fSEmmanuel Vadot #define CLK_AHB_OTG 23 19*c66ec88fSEmmanuel Vadot #define CLK_AHB_EHCI 24 20*c66ec88fSEmmanuel Vadot #define CLK_AHB_OHCI 25 21*c66ec88fSEmmanuel Vadot #define CLK_AHB_SS 26 22*c66ec88fSEmmanuel Vadot #define CLK_AHB_DMA 27 23*c66ec88fSEmmanuel Vadot #define CLK_AHB_BIST 28 24*c66ec88fSEmmanuel Vadot #define CLK_AHB_MMC0 29 25*c66ec88fSEmmanuel Vadot #define CLK_AHB_MMC1 30 26*c66ec88fSEmmanuel Vadot #define CLK_AHB_MMC2 31 27*c66ec88fSEmmanuel Vadot #define CLK_AHB_NAND 32 28*c66ec88fSEmmanuel Vadot #define CLK_AHB_SDRAM 33 29*c66ec88fSEmmanuel Vadot #define CLK_AHB_EMAC 34 30*c66ec88fSEmmanuel Vadot #define CLK_AHB_TS 35 31*c66ec88fSEmmanuel Vadot #define CLK_AHB_SPI0 36 32*c66ec88fSEmmanuel Vadot #define CLK_AHB_SPI1 37 33*c66ec88fSEmmanuel Vadot #define CLK_AHB_SPI2 38 34*c66ec88fSEmmanuel Vadot #define CLK_AHB_GPS 39 35*c66ec88fSEmmanuel Vadot #define CLK_AHB_HSTIMER 40 36*c66ec88fSEmmanuel Vadot #define CLK_AHB_VE 41 37*c66ec88fSEmmanuel Vadot #define CLK_AHB_TVE 42 38*c66ec88fSEmmanuel Vadot #define CLK_AHB_LCD 43 39*c66ec88fSEmmanuel Vadot #define CLK_AHB_CSI 44 40*c66ec88fSEmmanuel Vadot #define CLK_AHB_HDMI 45 41*c66ec88fSEmmanuel Vadot #define CLK_AHB_DE_BE 46 42*c66ec88fSEmmanuel Vadot #define CLK_AHB_DE_FE 47 43*c66ec88fSEmmanuel Vadot #define CLK_AHB_IEP 48 44*c66ec88fSEmmanuel Vadot #define CLK_AHB_GPU 49 45*c66ec88fSEmmanuel Vadot #define CLK_APB0_CODEC 50 46*c66ec88fSEmmanuel Vadot #define CLK_APB0_SPDIF 51 47*c66ec88fSEmmanuel Vadot #define CLK_APB0_I2S 52 48*c66ec88fSEmmanuel Vadot #define CLK_APB0_PIO 53 49*c66ec88fSEmmanuel Vadot #define CLK_APB0_IR 54 50*c66ec88fSEmmanuel Vadot #define CLK_APB0_KEYPAD 55 51*c66ec88fSEmmanuel Vadot #define CLK_APB1_I2C0 56 52*c66ec88fSEmmanuel Vadot #define CLK_APB1_I2C1 57 53*c66ec88fSEmmanuel Vadot #define CLK_APB1_I2C2 58 54*c66ec88fSEmmanuel Vadot #define CLK_APB1_UART0 59 55*c66ec88fSEmmanuel Vadot #define CLK_APB1_UART1 60 56*c66ec88fSEmmanuel Vadot #define CLK_APB1_UART2 61 57*c66ec88fSEmmanuel Vadot #define CLK_APB1_UART3 62 58*c66ec88fSEmmanuel Vadot #define CLK_NAND 63 59*c66ec88fSEmmanuel Vadot #define CLK_MMC0 64 60*c66ec88fSEmmanuel Vadot #define CLK_MMC1 65 61*c66ec88fSEmmanuel Vadot #define CLK_MMC2 66 62*c66ec88fSEmmanuel Vadot #define CLK_TS 67 63*c66ec88fSEmmanuel Vadot #define CLK_SS 68 64*c66ec88fSEmmanuel Vadot #define CLK_SPI0 69 65*c66ec88fSEmmanuel Vadot #define CLK_SPI1 70 66*c66ec88fSEmmanuel Vadot #define CLK_SPI2 71 67*c66ec88fSEmmanuel Vadot #define CLK_IR 72 68*c66ec88fSEmmanuel Vadot #define CLK_I2S 73 69*c66ec88fSEmmanuel Vadot #define CLK_SPDIF 74 70*c66ec88fSEmmanuel Vadot #define CLK_KEYPAD 75 71*c66ec88fSEmmanuel Vadot #define CLK_USB_OHCI 76 72*c66ec88fSEmmanuel Vadot #define CLK_USB_PHY0 77 73*c66ec88fSEmmanuel Vadot #define CLK_USB_PHY1 78 74*c66ec88fSEmmanuel Vadot #define CLK_GPS 79 75*c66ec88fSEmmanuel Vadot #define CLK_DRAM_VE 80 76*c66ec88fSEmmanuel Vadot #define CLK_DRAM_CSI 81 77*c66ec88fSEmmanuel Vadot #define CLK_DRAM_TS 82 78*c66ec88fSEmmanuel Vadot #define CLK_DRAM_TVE 83 79*c66ec88fSEmmanuel Vadot #define CLK_DRAM_DE_FE 84 80*c66ec88fSEmmanuel Vadot #define CLK_DRAM_DE_BE 85 81*c66ec88fSEmmanuel Vadot #define CLK_DRAM_ACE 86 82*c66ec88fSEmmanuel Vadot #define CLK_DRAM_IEP 87 83*c66ec88fSEmmanuel Vadot #define CLK_DE_BE 88 84*c66ec88fSEmmanuel Vadot #define CLK_DE_FE 89 85*c66ec88fSEmmanuel Vadot #define CLK_TCON_CH0 90 86*c66ec88fSEmmanuel Vadot 87*c66ec88fSEmmanuel Vadot #define CLK_TCON_CH1 92 88*c66ec88fSEmmanuel Vadot #define CLK_CSI 93 89*c66ec88fSEmmanuel Vadot #define CLK_VE 94 90*c66ec88fSEmmanuel Vadot #define CLK_CODEC 95 91*c66ec88fSEmmanuel Vadot #define CLK_AVS 96 92*c66ec88fSEmmanuel Vadot #define CLK_HDMI 97 93*c66ec88fSEmmanuel Vadot #define CLK_GPU 98 94*c66ec88fSEmmanuel Vadot #define CLK_MBUS 99 95*c66ec88fSEmmanuel Vadot #define CLK_IEP 100 96*c66ec88fSEmmanuel Vadot 97*c66ec88fSEmmanuel Vadot #endif /* _DT_BINDINGS_CLK_SUN5I_H_ */ 98