1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * This header provides constants clk index STMicroelectronics 4*c66ec88fSEmmanuel Vadot * STiH418 SoC. 5*c66ec88fSEmmanuel Vadot */ 6*c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_CLK_STIH418 7*c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_CLK_STIH418 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadot #include "stih410-clks.h" 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel Vadot /* STiH418 introduces new clock outputs compared to STiH410 */ 12*c66ec88fSEmmanuel Vadot 13*c66ec88fSEmmanuel Vadot /* CLOCKGEN C0 */ 14*c66ec88fSEmmanuel Vadot #define CLK_PROC_BDISP_0 14 15*c66ec88fSEmmanuel Vadot #define CLK_PROC_BDISP_1 15 16*c66ec88fSEmmanuel Vadot #define CLK_TX_ICN_1 23 17*c66ec88fSEmmanuel Vadot #define CLK_ETH_PHYREF 27 18*c66ec88fSEmmanuel Vadot #define CLK_PP_HEVC 35 19*c66ec88fSEmmanuel Vadot #define CLK_CLUST_HEVC 36 20*c66ec88fSEmmanuel Vadot #define CLK_HWPE_HEVC 37 21*c66ec88fSEmmanuel Vadot #define CLK_FC_HEVC 38 22*c66ec88fSEmmanuel Vadot #define CLK_PROC_MIXER 39 23*c66ec88fSEmmanuel Vadot #define CLK_PROC_SC 40 24*c66ec88fSEmmanuel Vadot #define CLK_AVSP_HEVC 41 25*c66ec88fSEmmanuel Vadot 26*c66ec88fSEmmanuel Vadot /* CLOCKGEN D2 */ 27*c66ec88fSEmmanuel Vadot #undef CLK_PIX_PIP 28*c66ec88fSEmmanuel Vadot #undef CLK_PIX_GDP1 29*c66ec88fSEmmanuel Vadot #undef CLK_PIX_GDP2 30*c66ec88fSEmmanuel Vadot #undef CLK_PIX_GDP3 31*c66ec88fSEmmanuel Vadot #undef CLK_PIX_GDP4 32*c66ec88fSEmmanuel Vadot 33*c66ec88fSEmmanuel Vadot #define CLK_TMDS_HDMI_DIV2 5 34*c66ec88fSEmmanuel Vadot #define CLK_VP9 47 35*c66ec88fSEmmanuel Vadot #endif 36