1*aa1a8ff2SEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 2e67e8565SEmmanuel Vadot /* 3e67e8565SEmmanuel Vadot * Copyright (C) 2021 Renesas Electronics Corp. 4e67e8565SEmmanuel Vadot */ 5e67e8565SEmmanuel Vadot #ifndef __DT_BINDINGS_CLOCK_R8A779F0_CPG_MSSR_H__ 6e67e8565SEmmanuel Vadot #define __DT_BINDINGS_CLOCK_R8A779F0_CPG_MSSR_H__ 7e67e8565SEmmanuel Vadot 8e67e8565SEmmanuel Vadot #include <dt-bindings/clock/renesas-cpg-mssr.h> 9e67e8565SEmmanuel Vadot 10e67e8565SEmmanuel Vadot /* r8a779f0 CPG Core Clocks */ 11e67e8565SEmmanuel Vadot 12e67e8565SEmmanuel Vadot #define R8A779F0_CLK_ZX 0 13e67e8565SEmmanuel Vadot #define R8A779F0_CLK_ZS 1 14e67e8565SEmmanuel Vadot #define R8A779F0_CLK_ZT 2 15e67e8565SEmmanuel Vadot #define R8A779F0_CLK_ZTR 3 16e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D2 4 17e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D3 5 18e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D4 6 19e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D2_MM 7 20e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D3_MM 8 21e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D4_MM 9 22e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D2_RT 10 23e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D3_RT 11 24e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D4_RT 12 25e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D6_RT 13 26e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D3_PER 14 27e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D6_PER 15 28e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D12_PER 16 29e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D24_PER 17 30e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D2_HSC 18 31e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D3_HSC 19 32e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D4_HSC 20 33e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D6_HSC 21 34e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D12_HSC 22 35e67e8565SEmmanuel Vadot #define R8A779F0_CLK_S0D2_CC 23 36e67e8565SEmmanuel Vadot #define R8A779F0_CLK_CL 24 37e67e8565SEmmanuel Vadot #define R8A779F0_CLK_CL16M 25 38e67e8565SEmmanuel Vadot #define R8A779F0_CLK_CL16M_MM 26 39e67e8565SEmmanuel Vadot #define R8A779F0_CLK_CL16M_RT 27 40e67e8565SEmmanuel Vadot #define R8A779F0_CLK_CL16M_PER 28 41e67e8565SEmmanuel Vadot #define R8A779F0_CLK_CL16M_HSC 29 42e67e8565SEmmanuel Vadot #define R8A779F0_CLK_Z0 30 43e67e8565SEmmanuel Vadot #define R8A779F0_CLK_Z1 31 44e67e8565SEmmanuel Vadot #define R8A779F0_CLK_ZB3 32 45e67e8565SEmmanuel Vadot #define R8A779F0_CLK_ZB3D2 33 46e67e8565SEmmanuel Vadot #define R8A779F0_CLK_ZB3D4 34 47e67e8565SEmmanuel Vadot #define R8A779F0_CLK_SD0H 35 48e67e8565SEmmanuel Vadot #define R8A779F0_CLK_SD0 36 49e67e8565SEmmanuel Vadot #define R8A779F0_CLK_RPC 37 50e67e8565SEmmanuel Vadot #define R8A779F0_CLK_RPCD2 38 51e67e8565SEmmanuel Vadot #define R8A779F0_CLK_MSO 39 52e67e8565SEmmanuel Vadot #define R8A779F0_CLK_SASYNCRT 40 53e67e8565SEmmanuel Vadot #define R8A779F0_CLK_SASYNCPERD1 41 54e67e8565SEmmanuel Vadot #define R8A779F0_CLK_SASYNCPERD2 42 55e67e8565SEmmanuel Vadot #define R8A779F0_CLK_SASYNCPERD4 43 56e67e8565SEmmanuel Vadot #define R8A779F0_CLK_DBGSOC_HSC 44 57e67e8565SEmmanuel Vadot #define R8A779F0_CLK_RSW2 45 58e67e8565SEmmanuel Vadot #define R8A779F0_CLK_OSC 46 59e67e8565SEmmanuel Vadot #define R8A779F0_CLK_ZR 47 60e67e8565SEmmanuel Vadot #define R8A779F0_CLK_CPEX 48 61e67e8565SEmmanuel Vadot #define R8A779F0_CLK_CBFUSA 49 62e67e8565SEmmanuel Vadot #define R8A779F0_CLK_R 50 63e67e8565SEmmanuel Vadot 64e67e8565SEmmanuel Vadot #endif /* __DT_BINDINGS_CLOCK_R8A779F0_CPG_MSSR_H__ */ 65