xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/r8a7778-clock.h (revision a03411e84728e9b267056fd31c7d1d9d1dc1b01e)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Copyright (C) 2014 Ulrich Hecht
4  */
5 
6 #ifndef __DT_BINDINGS_CLOCK_R8A7778_H__
7 #define __DT_BINDINGS_CLOCK_R8A7778_H__
8 
9 /* CPG */
10 #define R8A7778_CLK_PLLA	0
11 #define R8A7778_CLK_PLLB	1
12 #define R8A7778_CLK_B		2
13 #define R8A7778_CLK_OUT		3
14 #define R8A7778_CLK_P		4
15 #define R8A7778_CLK_S		5
16 #define R8A7778_CLK_S1		6
17 
18 /* MSTP0 */
19 #define R8A7778_CLK_I2C0	30
20 #define R8A7778_CLK_I2C1	29
21 #define R8A7778_CLK_I2C2	28
22 #define R8A7778_CLK_I2C3	27
23 #define R8A7778_CLK_SCIF0	26
24 #define R8A7778_CLK_SCIF1	25
25 #define R8A7778_CLK_SCIF2	24
26 #define R8A7778_CLK_SCIF3	23
27 #define R8A7778_CLK_SCIF4	22
28 #define R8A7778_CLK_SCIF5	21
29 #define R8A7778_CLK_HSCIF0	19
30 #define R8A7778_CLK_HSCIF1	18
31 #define R8A7778_CLK_TMU0	16
32 #define R8A7778_CLK_TMU1	15
33 #define R8A7778_CLK_TMU2	14
34 #define R8A7778_CLK_SSI0	12
35 #define R8A7778_CLK_SSI1	11
36 #define R8A7778_CLK_SSI2	10
37 #define R8A7778_CLK_SSI3	9
38 #define R8A7778_CLK_SRU		8
39 #define R8A7778_CLK_HSPI	7
40 
41 /* MSTP1 */
42 #define R8A7778_CLK_ETHER	14
43 #define R8A7778_CLK_VIN0	10
44 #define R8A7778_CLK_VIN1	9
45 #define R8A7778_CLK_USB		0
46 
47 /* MSTP3 */
48 #define R8A7778_CLK_MMC		31
49 #define R8A7778_CLK_SDHI0	23
50 #define R8A7778_CLK_SDHI1	22
51 #define R8A7778_CLK_SDHI2	21
52 #define R8A7778_CLK_SSI4	11
53 #define R8A7778_CLK_SSI5	10
54 #define R8A7778_CLK_SSI6	9
55 #define R8A7778_CLK_SSI7	8
56 #define R8A7778_CLK_SSI8	7
57 
58 /* MSTP5 */
59 #define R8A7778_CLK_SRU_SRC0	31
60 #define R8A7778_CLK_SRU_SRC1	30
61 #define R8A7778_CLK_SRU_SRC2	29
62 #define R8A7778_CLK_SRU_SRC3	28
63 #define R8A7778_CLK_SRU_SRC4	27
64 #define R8A7778_CLK_SRU_SRC5	26
65 #define R8A7778_CLK_SRU_SRC6	25
66 #define R8A7778_CLK_SRU_SRC7	24
67 #define R8A7778_CLK_SRU_SRC8	23
68 
69 #endif /* __DT_BINDINGS_CLOCK_R8A7778_H__ */
70