xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/qcom,sm8650-gpucc.h (revision 7fdf597e96a02165cfe22ff357b857d5fa15ed8a)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /*
3  * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved
4  * Copyright (c) 2023, Linaro Limited
5  */
6 
7 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8650_H
8 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8650_H
9 
10 /* GPU_CC clocks */
11 #define GPU_CC_AHB_CLK				0
12 #define GPU_CC_CRC_AHB_CLK			1
13 #define GPU_CC_CX_ACCU_SHIFT_CLK		2
14 #define GPU_CC_CX_FF_CLK			3
15 #define GPU_CC_CX_GMU_CLK			4
16 #define GPU_CC_CXO_AON_CLK			5
17 #define GPU_CC_CXO_CLK				6
18 #define GPU_CC_DEMET_CLK			7
19 #define GPU_CC_DPM_CLK				8
20 #define GPU_CC_FF_CLK_SRC			9
21 #define GPU_CC_FREQ_MEASURE_CLK			10
22 #define GPU_CC_GMU_CLK_SRC			11
23 #define GPU_CC_GX_ACCU_SHIFT_CLK		12
24 #define GPU_CC_GX_FF_CLK			13
25 #define GPU_CC_GX_GFX3D_CLK			14
26 #define GPU_CC_GX_GFX3D_RDVM_CLK		15
27 #define GPU_CC_GX_GMU_CLK			16
28 #define GPU_CC_GX_VSENSE_CLK			17
29 #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK		18
30 #define GPU_CC_HUB_AON_CLK			19
31 #define GPU_CC_HUB_CLK_SRC			20
32 #define GPU_CC_HUB_CX_INT_CLK			21
33 #define GPU_CC_HUB_DIV_CLK_SRC			22
34 #define GPU_CC_MEMNOC_GFX_CLK			23
35 #define GPU_CC_PLL0				24
36 #define GPU_CC_PLL1				25
37 #define GPU_CC_SLEEP_CLK			26
38 
39 /* GDSCs */
40 #define GPU_GX_GDSC				0
41 #define GPU_CX_GDSC				1
42 
43 #endif
44