xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/qcom,sc8180x-camcc.h (revision 833e5d42ab135b0238e61c5b3c19b8619677cbfa)
1*833e5d42SEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*833e5d42SEmmanuel Vadot /*
3*833e5d42SEmmanuel Vadot  * Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved.
4*833e5d42SEmmanuel Vadot  */
5*833e5d42SEmmanuel Vadot 
6*833e5d42SEmmanuel Vadot #ifndef _DT_BINDINGS_CLK_QCOM_CAM_CC_SC8180X_H
7*833e5d42SEmmanuel Vadot #define _DT_BINDINGS_CLK_QCOM_CAM_CC_SC8180X_H
8*833e5d42SEmmanuel Vadot 
9*833e5d42SEmmanuel Vadot /* CAM_CC clocks */
10*833e5d42SEmmanuel Vadot #define CAM_CC_BPS_AHB_CLK					0
11*833e5d42SEmmanuel Vadot #define CAM_CC_BPS_AREG_CLK					1
12*833e5d42SEmmanuel Vadot #define CAM_CC_BPS_AXI_CLK					2
13*833e5d42SEmmanuel Vadot #define CAM_CC_BPS_CLK						3
14*833e5d42SEmmanuel Vadot #define CAM_CC_BPS_CLK_SRC					4
15*833e5d42SEmmanuel Vadot #define CAM_CC_CAMNOC_AXI_CLK					5
16*833e5d42SEmmanuel Vadot #define CAM_CC_CAMNOC_AXI_CLK_SRC				6
17*833e5d42SEmmanuel Vadot #define CAM_CC_CAMNOC_DCD_XO_CLK				7
18*833e5d42SEmmanuel Vadot #define CAM_CC_CCI_0_CLK					8
19*833e5d42SEmmanuel Vadot #define CAM_CC_CCI_0_CLK_SRC					9
20*833e5d42SEmmanuel Vadot #define CAM_CC_CCI_1_CLK					10
21*833e5d42SEmmanuel Vadot #define CAM_CC_CCI_1_CLK_SRC					11
22*833e5d42SEmmanuel Vadot #define CAM_CC_CCI_2_CLK					12
23*833e5d42SEmmanuel Vadot #define CAM_CC_CCI_2_CLK_SRC					13
24*833e5d42SEmmanuel Vadot #define CAM_CC_CCI_3_CLK					14
25*833e5d42SEmmanuel Vadot #define CAM_CC_CCI_3_CLK_SRC					15
26*833e5d42SEmmanuel Vadot #define CAM_CC_CORE_AHB_CLK					16
27*833e5d42SEmmanuel Vadot #define CAM_CC_CPAS_AHB_CLK					17
28*833e5d42SEmmanuel Vadot #define CAM_CC_CPHY_RX_CLK_SRC					18
29*833e5d42SEmmanuel Vadot #define CAM_CC_CSI0PHYTIMER_CLK					19
30*833e5d42SEmmanuel Vadot #define CAM_CC_CSI0PHYTIMER_CLK_SRC				20
31*833e5d42SEmmanuel Vadot #define CAM_CC_CSI1PHYTIMER_CLK					21
32*833e5d42SEmmanuel Vadot #define CAM_CC_CSI1PHYTIMER_CLK_SRC				22
33*833e5d42SEmmanuel Vadot #define CAM_CC_CSI2PHYTIMER_CLK					23
34*833e5d42SEmmanuel Vadot #define CAM_CC_CSI2PHYTIMER_CLK_SRC				24
35*833e5d42SEmmanuel Vadot #define CAM_CC_CSI3PHYTIMER_CLK					25
36*833e5d42SEmmanuel Vadot #define CAM_CC_CSI3PHYTIMER_CLK_SRC				26
37*833e5d42SEmmanuel Vadot #define CAM_CC_CSIPHY0_CLK					27
38*833e5d42SEmmanuel Vadot #define CAM_CC_CSIPHY1_CLK					28
39*833e5d42SEmmanuel Vadot #define CAM_CC_CSIPHY2_CLK					29
40*833e5d42SEmmanuel Vadot #define CAM_CC_CSIPHY3_CLK					30
41*833e5d42SEmmanuel Vadot #define CAM_CC_FAST_AHB_CLK_SRC					31
42*833e5d42SEmmanuel Vadot #define CAM_CC_FD_CORE_CLK					32
43*833e5d42SEmmanuel Vadot #define CAM_CC_FD_CORE_CLK_SRC					33
44*833e5d42SEmmanuel Vadot #define CAM_CC_FD_CORE_UAR_CLK					34
45*833e5d42SEmmanuel Vadot #define CAM_CC_ICP_AHB_CLK					35
46*833e5d42SEmmanuel Vadot #define CAM_CC_ICP_CLK						36
47*833e5d42SEmmanuel Vadot #define CAM_CC_ICP_CLK_SRC					37
48*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_0_AXI_CLK					38
49*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_0_CLK					39
50*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_0_CLK_SRC					40
51*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_0_CPHY_RX_CLK				41
52*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_0_CSID_CLK					42
53*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_0_CSID_CLK_SRC				43
54*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_0_DSP_CLK					44
55*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_1_AXI_CLK					45
56*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_1_CLK					46
57*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_1_CLK_SRC					47
58*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_1_CPHY_RX_CLK				48
59*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_1_CSID_CLK					49
60*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_1_CSID_CLK_SRC				50
61*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_1_DSP_CLK					51
62*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_2_AXI_CLK					52
63*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_2_CLK					53
64*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_2_CLK_SRC					54
65*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_2_CPHY_RX_CLK				55
66*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_2_CSID_CLK					56
67*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_2_CSID_CLK_SRC				57
68*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_2_DSP_CLK					58
69*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_3_AXI_CLK					59
70*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_3_CLK					60
71*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_3_CLK_SRC					61
72*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_3_CPHY_RX_CLK				62
73*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_3_CSID_CLK					63
74*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_3_CSID_CLK_SRC				64
75*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_3_DSP_CLK					65
76*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_0_CLK					66
77*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_0_CLK_SRC				67
78*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_0_CPHY_RX_CLK				68
79*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_0_CSID_CLK				69
80*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_0_CSID_CLK_SRC				70
81*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_1_CLK					71
82*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_1_CLK_SRC				72
83*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_1_CPHY_RX_CLK				73
84*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_1_CSID_CLK				74
85*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_1_CSID_CLK_SRC				75
86*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_2_CLK					76
87*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_2_CLK_SRC				77
88*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_2_CPHY_RX_CLK				78
89*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_2_CSID_CLK				79
90*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_2_CSID_CLK_SRC				80
91*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_3_CLK					81
92*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_3_CLK_SRC				82
93*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_3_CPHY_RX_CLK				83
94*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_3_CSID_CLK				84
95*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_3_CSID_CLK_SRC				85
96*833e5d42SEmmanuel Vadot #define CAM_CC_IPE_0_AHB_CLK					86
97*833e5d42SEmmanuel Vadot #define CAM_CC_IPE_0_AREG_CLK					87
98*833e5d42SEmmanuel Vadot #define CAM_CC_IPE_0_AXI_CLK					88
99*833e5d42SEmmanuel Vadot #define CAM_CC_IPE_0_CLK					89
100*833e5d42SEmmanuel Vadot #define CAM_CC_IPE_0_CLK_SRC					90
101*833e5d42SEmmanuel Vadot #define CAM_CC_IPE_1_AHB_CLK					91
102*833e5d42SEmmanuel Vadot #define CAM_CC_IPE_1_AREG_CLK					92
103*833e5d42SEmmanuel Vadot #define CAM_CC_IPE_1_AXI_CLK					93
104*833e5d42SEmmanuel Vadot #define CAM_CC_IPE_1_CLK					94
105*833e5d42SEmmanuel Vadot #define CAM_CC_JPEG_CLK						95
106*833e5d42SEmmanuel Vadot #define CAM_CC_JPEG_CLK_SRC					96
107*833e5d42SEmmanuel Vadot #define CAM_CC_LRME_CLK						97
108*833e5d42SEmmanuel Vadot #define CAM_CC_LRME_CLK_SRC					98
109*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK0_CLK					99
110*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK0_CLK_SRC					100
111*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK1_CLK					101
112*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK1_CLK_SRC					102
113*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK2_CLK					103
114*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK2_CLK_SRC					104
115*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK3_CLK					105
116*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK3_CLK_SRC					106
117*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK4_CLK					107
118*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK4_CLK_SRC					108
119*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK5_CLK					109
120*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK5_CLK_SRC					110
121*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK6_CLK					111
122*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK6_CLK_SRC					112
123*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK7_CLK					113
124*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK7_CLK_SRC					114
125*833e5d42SEmmanuel Vadot #define CAM_CC_PLL0						115
126*833e5d42SEmmanuel Vadot #define CAM_CC_PLL0_OUT_EVEN					116
127*833e5d42SEmmanuel Vadot #define CAM_CC_PLL0_OUT_ODD					117
128*833e5d42SEmmanuel Vadot #define CAM_CC_PLL1						118
129*833e5d42SEmmanuel Vadot #define CAM_CC_PLL2						119
130*833e5d42SEmmanuel Vadot #define CAM_CC_PLL2_OUT_MAIN					120
131*833e5d42SEmmanuel Vadot #define CAM_CC_PLL3						121
132*833e5d42SEmmanuel Vadot #define CAM_CC_PLL4						122
133*833e5d42SEmmanuel Vadot #define CAM_CC_PLL5						123
134*833e5d42SEmmanuel Vadot #define CAM_CC_PLL6						124
135*833e5d42SEmmanuel Vadot #define CAM_CC_SLOW_AHB_CLK_SRC					125
136*833e5d42SEmmanuel Vadot #define CAM_CC_XO_CLK_SRC					126
137*833e5d42SEmmanuel Vadot 
138*833e5d42SEmmanuel Vadot 
139*833e5d42SEmmanuel Vadot /* CAM_CC power domains */
140*833e5d42SEmmanuel Vadot #define BPS_GDSC						0
141*833e5d42SEmmanuel Vadot #define IFE_0_GDSC						1
142*833e5d42SEmmanuel Vadot #define IFE_1_GDSC						2
143*833e5d42SEmmanuel Vadot #define IFE_2_GDSC						3
144*833e5d42SEmmanuel Vadot #define IFE_3_GDSC						4
145*833e5d42SEmmanuel Vadot #define IPE_0_GDSC						5
146*833e5d42SEmmanuel Vadot #define IPE_1_GDSC						6
147*833e5d42SEmmanuel Vadot #define TITAN_TOP_GDSC						7
148*833e5d42SEmmanuel Vadot 
149*833e5d42SEmmanuel Vadot /* CAM_CC resets */
150*833e5d42SEmmanuel Vadot #define CAM_CC_BPS_BCR						0
151*833e5d42SEmmanuel Vadot #define CAM_CC_CAMNOC_BCR					1
152*833e5d42SEmmanuel Vadot #define CAM_CC_CCI_BCR						2
153*833e5d42SEmmanuel Vadot #define CAM_CC_CPAS_BCR						3
154*833e5d42SEmmanuel Vadot #define CAM_CC_CSI0PHY_BCR					4
155*833e5d42SEmmanuel Vadot #define CAM_CC_CSI1PHY_BCR					5
156*833e5d42SEmmanuel Vadot #define CAM_CC_CSI2PHY_BCR					6
157*833e5d42SEmmanuel Vadot #define CAM_CC_CSI3PHY_BCR					7
158*833e5d42SEmmanuel Vadot #define CAM_CC_FD_BCR						8
159*833e5d42SEmmanuel Vadot #define CAM_CC_ICP_BCR						9
160*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_0_BCR					10
161*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_1_BCR					11
162*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_2_BCR					12
163*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_3_BCR					13
164*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_0_BCR					14
165*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_1_BCR					15
166*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_2_BCR					16
167*833e5d42SEmmanuel Vadot #define CAM_CC_IFE_LITE_3_BCR					17
168*833e5d42SEmmanuel Vadot #define CAM_CC_IPE_0_BCR					18
169*833e5d42SEmmanuel Vadot #define CAM_CC_IPE_1_BCR					19
170*833e5d42SEmmanuel Vadot #define CAM_CC_JPEG_BCR						20
171*833e5d42SEmmanuel Vadot #define CAM_CC_LRME_BCR						21
172*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK0_BCR					22
173*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK1_BCR					23
174*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK2_BCR					24
175*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK3_BCR					25
176*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK4_BCR					26
177*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK5_BCR					27
178*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK6_BCR					28
179*833e5d42SEmmanuel Vadot #define CAM_CC_MCLK7_BCR					29
180*833e5d42SEmmanuel Vadot 
181*833e5d42SEmmanuel Vadot #endif
182