xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/qcom,qcs615-videocc.h (revision 833e5d42ab135b0238e61c5b3c19b8619677cbfa)
1*833e5d42SEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*833e5d42SEmmanuel Vadot /*
3*833e5d42SEmmanuel Vadot  * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
4*833e5d42SEmmanuel Vadot  */
5*833e5d42SEmmanuel Vadot 
6*833e5d42SEmmanuel Vadot #ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_QCS615_H
7*833e5d42SEmmanuel Vadot #define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_QCS615_H
8*833e5d42SEmmanuel Vadot 
9*833e5d42SEmmanuel Vadot /* VIDEO_CC clocks */
10*833e5d42SEmmanuel Vadot #define VIDEO_CC_SLEEP_CLK					0
11*833e5d42SEmmanuel Vadot #define VIDEO_CC_SLEEP_CLK_SRC					1
12*833e5d42SEmmanuel Vadot #define VIDEO_CC_VCODEC0_AXI_CLK				2
13*833e5d42SEmmanuel Vadot #define VIDEO_CC_VCODEC0_CORE_CLK				3
14*833e5d42SEmmanuel Vadot #define VIDEO_CC_VENUS_AHB_CLK					4
15*833e5d42SEmmanuel Vadot #define VIDEO_CC_VENUS_CLK_SRC					5
16*833e5d42SEmmanuel Vadot #define VIDEO_CC_VENUS_CTL_AXI_CLK				6
17*833e5d42SEmmanuel Vadot #define VIDEO_CC_VENUS_CTL_CORE_CLK				7
18*833e5d42SEmmanuel Vadot #define VIDEO_CC_XO_CLK						8
19*833e5d42SEmmanuel Vadot #define VIDEO_PLL0						9
20*833e5d42SEmmanuel Vadot 
21*833e5d42SEmmanuel Vadot /* VIDEO_CC power domains */
22*833e5d42SEmmanuel Vadot #define VCODEC0_GDSC						0
23*833e5d42SEmmanuel Vadot #define VENUS_GDSC						1
24*833e5d42SEmmanuel Vadot 
25*833e5d42SEmmanuel Vadot /* VIDEO_CC resets */
26*833e5d42SEmmanuel Vadot #define VIDEO_CC_INTERFACE_BCR					0
27*833e5d42SEmmanuel Vadot #define VIDEO_CC_VCODEC0_BCR					1
28*833e5d42SEmmanuel Vadot #define VIDEO_CC_VENUS_BCR					2
29*833e5d42SEmmanuel Vadot 
30*833e5d42SEmmanuel Vadot #endif
31