xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/qcom,milos-videocc.h (revision 833e5d42ab135b0238e61c5b3c19b8619677cbfa)
1*833e5d42SEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*833e5d42SEmmanuel Vadot /*
3*833e5d42SEmmanuel Vadot  * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
4*833e5d42SEmmanuel Vadot  * Copyright (c) 2025, Luca Weiss <luca.weiss@fairphone.com>
5*833e5d42SEmmanuel Vadot  */
6*833e5d42SEmmanuel Vadot 
7*833e5d42SEmmanuel Vadot #ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_MILOS_H
8*833e5d42SEmmanuel Vadot #define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_MILOS_H
9*833e5d42SEmmanuel Vadot 
10*833e5d42SEmmanuel Vadot /* VIDEO_CC clocks */
11*833e5d42SEmmanuel Vadot #define VIDEO_CC_PLL0						0
12*833e5d42SEmmanuel Vadot #define VIDEO_CC_AHB_CLK					1
13*833e5d42SEmmanuel Vadot #define VIDEO_CC_AHB_CLK_SRC					2
14*833e5d42SEmmanuel Vadot #define VIDEO_CC_MVS0_CLK					3
15*833e5d42SEmmanuel Vadot #define VIDEO_CC_MVS0_CLK_SRC					4
16*833e5d42SEmmanuel Vadot #define VIDEO_CC_MVS0_DIV_CLK_SRC				5
17*833e5d42SEmmanuel Vadot #define VIDEO_CC_MVS0_SHIFT_CLK					6
18*833e5d42SEmmanuel Vadot #define VIDEO_CC_MVS0C_CLK					7
19*833e5d42SEmmanuel Vadot #define VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC				8
20*833e5d42SEmmanuel Vadot #define VIDEO_CC_MVS0C_SHIFT_CLK				9
21*833e5d42SEmmanuel Vadot #define VIDEO_CC_SLEEP_CLK					10
22*833e5d42SEmmanuel Vadot #define VIDEO_CC_SLEEP_CLK_SRC					11
23*833e5d42SEmmanuel Vadot #define VIDEO_CC_XO_CLK						12
24*833e5d42SEmmanuel Vadot #define VIDEO_CC_XO_CLK_SRC					13
25*833e5d42SEmmanuel Vadot 
26*833e5d42SEmmanuel Vadot /* VIDEO_CC resets */
27*833e5d42SEmmanuel Vadot #define VIDEO_CC_INTERFACE_BCR					0
28*833e5d42SEmmanuel Vadot #define VIDEO_CC_MVS0_BCR					1
29*833e5d42SEmmanuel Vadot #define VIDEO_CC_MVS0C_CLK_ARES					2
30*833e5d42SEmmanuel Vadot #define VIDEO_CC_MVS0C_BCR					3
31*833e5d42SEmmanuel Vadot 
32*833e5d42SEmmanuel Vadot /* VIDEO_CC power domains */
33*833e5d42SEmmanuel Vadot #define VIDEO_CC_MVS0_GDSC					0
34*833e5d42SEmmanuel Vadot #define VIDEO_CC_MVS0C_GDSC					1
35*833e5d42SEmmanuel Vadot 
36*833e5d42SEmmanuel Vadot #endif
37