xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/qcom,gcc-sdm660.h (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */
2*c66ec88fSEmmanuel Vadot /*
3*c66ec88fSEmmanuel Vadot  * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
4*c66ec88fSEmmanuel Vadot  * Copyright (c) 2018, Craig Tatlor.
5*c66ec88fSEmmanuel Vadot  */
6*c66ec88fSEmmanuel Vadot 
7*c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_CLK_MSM_GCC_660_H
8*c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_CLK_MSM_GCC_660_H
9*c66ec88fSEmmanuel Vadot 
10*c66ec88fSEmmanuel Vadot #define BLSP1_QUP1_I2C_APPS_CLK_SRC		0
11*c66ec88fSEmmanuel Vadot #define BLSP1_QUP1_SPI_APPS_CLK_SRC		1
12*c66ec88fSEmmanuel Vadot #define BLSP1_QUP2_I2C_APPS_CLK_SRC		2
13*c66ec88fSEmmanuel Vadot #define BLSP1_QUP2_SPI_APPS_CLK_SRC		3
14*c66ec88fSEmmanuel Vadot #define BLSP1_QUP3_I2C_APPS_CLK_SRC		4
15*c66ec88fSEmmanuel Vadot #define BLSP1_QUP3_SPI_APPS_CLK_SRC		5
16*c66ec88fSEmmanuel Vadot #define BLSP1_QUP4_I2C_APPS_CLK_SRC		6
17*c66ec88fSEmmanuel Vadot #define BLSP1_QUP4_SPI_APPS_CLK_SRC		7
18*c66ec88fSEmmanuel Vadot #define BLSP1_UART1_APPS_CLK_SRC		8
19*c66ec88fSEmmanuel Vadot #define BLSP1_UART2_APPS_CLK_SRC		9
20*c66ec88fSEmmanuel Vadot #define BLSP2_QUP1_I2C_APPS_CLK_SRC		10
21*c66ec88fSEmmanuel Vadot #define BLSP2_QUP1_SPI_APPS_CLK_SRC		11
22*c66ec88fSEmmanuel Vadot #define BLSP2_QUP2_I2C_APPS_CLK_SRC		12
23*c66ec88fSEmmanuel Vadot #define BLSP2_QUP2_SPI_APPS_CLK_SRC		13
24*c66ec88fSEmmanuel Vadot #define BLSP2_QUP3_I2C_APPS_CLK_SRC		14
25*c66ec88fSEmmanuel Vadot #define BLSP2_QUP3_SPI_APPS_CLK_SRC		15
26*c66ec88fSEmmanuel Vadot #define BLSP2_QUP4_I2C_APPS_CLK_SRC		16
27*c66ec88fSEmmanuel Vadot #define BLSP2_QUP4_SPI_APPS_CLK_SRC		17
28*c66ec88fSEmmanuel Vadot #define BLSP2_UART1_APPS_CLK_SRC		18
29*c66ec88fSEmmanuel Vadot #define BLSP2_UART2_APPS_CLK_SRC		19
30*c66ec88fSEmmanuel Vadot #define GCC_AGGRE2_UFS_AXI_CLK			20
31*c66ec88fSEmmanuel Vadot #define GCC_AGGRE2_USB3_AXI_CLK			21
32*c66ec88fSEmmanuel Vadot #define GCC_BIMC_GFX_CLK			22
33*c66ec88fSEmmanuel Vadot #define GCC_BIMC_HMSS_AXI_CLK			23
34*c66ec88fSEmmanuel Vadot #define GCC_BIMC_MSS_Q6_AXI_CLK			24
35*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_AHB_CLK			25
36*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP1_I2C_APPS_CLK		26
37*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP1_SPI_APPS_CLK		27
38*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP2_I2C_APPS_CLK		28
39*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP2_SPI_APPS_CLK		29
40*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP3_I2C_APPS_CLK		30
41*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP3_SPI_APPS_CLK		31
42*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP4_I2C_APPS_CLK		32
43*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP4_SPI_APPS_CLK		33
44*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART1_APPS_CLK		34
45*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART2_APPS_CLK		35
46*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_AHB_CLK			36
47*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP1_I2C_APPS_CLK		37
48*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP1_SPI_APPS_CLK		38
49*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP2_I2C_APPS_CLK		39
50*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP2_SPI_APPS_CLK		40
51*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP3_I2C_APPS_CLK		41
52*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP3_SPI_APPS_CLK		42
53*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP4_I2C_APPS_CLK		43
54*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP4_SPI_APPS_CLK		44
55*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART1_APPS_CLK		45
56*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART2_APPS_CLK		46
57*c66ec88fSEmmanuel Vadot #define GCC_BOOT_ROM_AHB_CLK			47
58*c66ec88fSEmmanuel Vadot #define GCC_CFG_NOC_USB2_AXI_CLK		48
59*c66ec88fSEmmanuel Vadot #define GCC_CFG_NOC_USB3_AXI_CLK		49
60*c66ec88fSEmmanuel Vadot #define GCC_DCC_AHB_CLK				50
61*c66ec88fSEmmanuel Vadot #define GCC_GP1_CLK				51
62*c66ec88fSEmmanuel Vadot #define GCC_GP2_CLK				52
63*c66ec88fSEmmanuel Vadot #define GCC_GP3_CLK				53
64*c66ec88fSEmmanuel Vadot #define GCC_GPU_BIMC_GFX_CLK			54
65*c66ec88fSEmmanuel Vadot #define GCC_GPU_CFG_AHB_CLK			55
66*c66ec88fSEmmanuel Vadot #define GCC_GPU_GPLL0_CLK			56
67*c66ec88fSEmmanuel Vadot #define GCC_GPU_GPLL0_DIV_CLK			57
68*c66ec88fSEmmanuel Vadot #define GCC_HMSS_DVM_BUS_CLK			58
69*c66ec88fSEmmanuel Vadot #define GCC_HMSS_RBCPR_CLK			59
70*c66ec88fSEmmanuel Vadot #define GCC_MMSS_GPLL0_CLK			60
71*c66ec88fSEmmanuel Vadot #define GCC_MMSS_GPLL0_DIV_CLK			61
72*c66ec88fSEmmanuel Vadot #define GCC_MMSS_NOC_CFG_AHB_CLK		62
73*c66ec88fSEmmanuel Vadot #define GCC_MMSS_SYS_NOC_AXI_CLK		63
74*c66ec88fSEmmanuel Vadot #define GCC_MSS_CFG_AHB_CLK			64
75*c66ec88fSEmmanuel Vadot #define GCC_MSS_GPLL0_DIV_CLK			65
76*c66ec88fSEmmanuel Vadot #define GCC_MSS_MNOC_BIMC_AXI_CLK		66
77*c66ec88fSEmmanuel Vadot #define GCC_MSS_Q6_BIMC_AXI_CLK			67
78*c66ec88fSEmmanuel Vadot #define GCC_MSS_SNOC_AXI_CLK			68
79*c66ec88fSEmmanuel Vadot #define GCC_PDM2_CLK				69
80*c66ec88fSEmmanuel Vadot #define GCC_PDM_AHB_CLK				70
81*c66ec88fSEmmanuel Vadot #define GCC_PRNG_AHB_CLK			71
82*c66ec88fSEmmanuel Vadot #define GCC_QSPI_AHB_CLK			72
83*c66ec88fSEmmanuel Vadot #define GCC_QSPI_SER_CLK			73
84*c66ec88fSEmmanuel Vadot #define GCC_SDCC1_AHB_CLK			74
85*c66ec88fSEmmanuel Vadot #define GCC_SDCC1_APPS_CLK			75
86*c66ec88fSEmmanuel Vadot #define GCC_SDCC1_ICE_CORE_CLK			76
87*c66ec88fSEmmanuel Vadot #define GCC_SDCC2_AHB_CLK			77
88*c66ec88fSEmmanuel Vadot #define GCC_SDCC2_APPS_CLK			78
89*c66ec88fSEmmanuel Vadot #define GCC_UFS_AHB_CLK				79
90*c66ec88fSEmmanuel Vadot #define GCC_UFS_AXI_CLK				80
91*c66ec88fSEmmanuel Vadot #define GCC_UFS_CLKREF_CLK			81
92*c66ec88fSEmmanuel Vadot #define GCC_UFS_ICE_CORE_CLK			82
93*c66ec88fSEmmanuel Vadot #define GCC_UFS_PHY_AUX_CLK			83
94*c66ec88fSEmmanuel Vadot #define GCC_UFS_RX_SYMBOL_0_CLK			84
95*c66ec88fSEmmanuel Vadot #define GCC_UFS_RX_SYMBOL_1_CLK			85
96*c66ec88fSEmmanuel Vadot #define GCC_UFS_TX_SYMBOL_0_CLK			86
97*c66ec88fSEmmanuel Vadot #define GCC_UFS_UNIPRO_CORE_CLK			87
98*c66ec88fSEmmanuel Vadot #define GCC_USB20_MASTER_CLK			88
99*c66ec88fSEmmanuel Vadot #define GCC_USB20_MOCK_UTMI_CLK			89
100*c66ec88fSEmmanuel Vadot #define GCC_USB20_SLEEP_CLK			90
101*c66ec88fSEmmanuel Vadot #define GCC_USB30_MASTER_CLK			91
102*c66ec88fSEmmanuel Vadot #define GCC_USB30_MOCK_UTMI_CLK			92
103*c66ec88fSEmmanuel Vadot #define GCC_USB30_SLEEP_CLK			93
104*c66ec88fSEmmanuel Vadot #define GCC_USB3_CLKREF_CLK			94
105*c66ec88fSEmmanuel Vadot #define GCC_USB3_PHY_AUX_CLK			95
106*c66ec88fSEmmanuel Vadot #define GCC_USB3_PHY_PIPE_CLK			96
107*c66ec88fSEmmanuel Vadot #define GCC_USB_PHY_CFG_AHB2PHY_CLK		97
108*c66ec88fSEmmanuel Vadot #define GP1_CLK_SRC				98
109*c66ec88fSEmmanuel Vadot #define GP2_CLK_SRC				99
110*c66ec88fSEmmanuel Vadot #define GP3_CLK_SRC				100
111*c66ec88fSEmmanuel Vadot #define GPLL0					101
112*c66ec88fSEmmanuel Vadot #define GPLL0_EARLY				102
113*c66ec88fSEmmanuel Vadot #define GPLL1					103
114*c66ec88fSEmmanuel Vadot #define GPLL1_EARLY				104
115*c66ec88fSEmmanuel Vadot #define GPLL4					105
116*c66ec88fSEmmanuel Vadot #define GPLL4_EARLY				106
117*c66ec88fSEmmanuel Vadot #define HMSS_GPLL0_CLK_SRC			107
118*c66ec88fSEmmanuel Vadot #define HMSS_GPLL4_CLK_SRC			108
119*c66ec88fSEmmanuel Vadot #define HMSS_RBCPR_CLK_SRC			109
120*c66ec88fSEmmanuel Vadot #define PDM2_CLK_SRC				110
121*c66ec88fSEmmanuel Vadot #define QSPI_SER_CLK_SRC			111
122*c66ec88fSEmmanuel Vadot #define SDCC1_APPS_CLK_SRC			112
123*c66ec88fSEmmanuel Vadot #define SDCC1_ICE_CORE_CLK_SRC			113
124*c66ec88fSEmmanuel Vadot #define SDCC2_APPS_CLK_SRC			114
125*c66ec88fSEmmanuel Vadot #define UFS_AXI_CLK_SRC				115
126*c66ec88fSEmmanuel Vadot #define UFS_ICE_CORE_CLK_SRC			116
127*c66ec88fSEmmanuel Vadot #define UFS_PHY_AUX_CLK_SRC			117
128*c66ec88fSEmmanuel Vadot #define UFS_UNIPRO_CORE_CLK_SRC			118
129*c66ec88fSEmmanuel Vadot #define USB20_MASTER_CLK_SRC			119
130*c66ec88fSEmmanuel Vadot #define USB20_MOCK_UTMI_CLK_SRC			120
131*c66ec88fSEmmanuel Vadot #define USB30_MASTER_CLK_SRC			121
132*c66ec88fSEmmanuel Vadot #define USB30_MOCK_UTMI_CLK_SRC			122
133*c66ec88fSEmmanuel Vadot #define USB3_PHY_AUX_CLK_SRC			123
134*c66ec88fSEmmanuel Vadot #define GPLL0_OUT_MSSCC				124
135*c66ec88fSEmmanuel Vadot #define GCC_UFS_AXI_HW_CTL_CLK			125
136*c66ec88fSEmmanuel Vadot #define GCC_UFS_ICE_CORE_HW_CTL_CLK		126
137*c66ec88fSEmmanuel Vadot #define GCC_UFS_PHY_AUX_HW_CTL_CLK		127
138*c66ec88fSEmmanuel Vadot #define GCC_UFS_UNIPRO_CORE_HW_CTL_CLK		128
139*c66ec88fSEmmanuel Vadot #define GCC_RX0_USB2_CLKREF_CLK			129
140*c66ec88fSEmmanuel Vadot #define GCC_RX1_USB2_CLKREF_CLK			130
141*c66ec88fSEmmanuel Vadot 
142*c66ec88fSEmmanuel Vadot #define PCIE_0_GDSC	0
143*c66ec88fSEmmanuel Vadot #define UFS_GDSC	1
144*c66ec88fSEmmanuel Vadot #define USB_30_GDSC	2
145*c66ec88fSEmmanuel Vadot 
146*c66ec88fSEmmanuel Vadot #define GCC_QUSB2PHY_PRIM_BCR		0
147*c66ec88fSEmmanuel Vadot #define GCC_QUSB2PHY_SEC_BCR		1
148*c66ec88fSEmmanuel Vadot #define GCC_UFS_BCR			2
149*c66ec88fSEmmanuel Vadot #define GCC_USB3_DP_PHY_BCR		3
150*c66ec88fSEmmanuel Vadot #define GCC_USB3_PHY_BCR		4
151*c66ec88fSEmmanuel Vadot #define GCC_USB3PHY_PHY_BCR		5
152*c66ec88fSEmmanuel Vadot #define GCC_USB_20_BCR                  6
153*c66ec88fSEmmanuel Vadot #define GCC_USB_30_BCR			7
154*c66ec88fSEmmanuel Vadot #define GCC_USB_PHY_CFG_AHB2PHY_BCR	8
155*c66ec88fSEmmanuel Vadot #define GCC_MSS_RESTART			9
156*c66ec88fSEmmanuel Vadot 
157*c66ec88fSEmmanuel Vadot #endif
158