1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * Copyright (c) 2013, The Linux Foundation. All rights reserved. 4*c66ec88fSEmmanuel Vadot */ 5*c66ec88fSEmmanuel Vadot 6*c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_CLK_MSM_GCC_8974_H 7*c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_CLK_MSM_GCC_8974_H 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadot #define GPLL0 0 10*c66ec88fSEmmanuel Vadot #define GPLL0_VOTE 1 11*c66ec88fSEmmanuel Vadot #define CONFIG_NOC_CLK_SRC 2 12*c66ec88fSEmmanuel Vadot #define GPLL2 3 13*c66ec88fSEmmanuel Vadot #define GPLL2_VOTE 4 14*c66ec88fSEmmanuel Vadot #define GPLL3 5 15*c66ec88fSEmmanuel Vadot #define GPLL3_VOTE 6 16*c66ec88fSEmmanuel Vadot #define PERIPH_NOC_CLK_SRC 7 17*c66ec88fSEmmanuel Vadot #define BLSP_UART_SIM_CLK_SRC 8 18*c66ec88fSEmmanuel Vadot #define QDSS_TSCTR_CLK_SRC 9 19*c66ec88fSEmmanuel Vadot #define BIMC_DDR_CLK_SRC 10 20*c66ec88fSEmmanuel Vadot #define SYSTEM_NOC_CLK_SRC 11 21*c66ec88fSEmmanuel Vadot #define GPLL1 12 22*c66ec88fSEmmanuel Vadot #define GPLL1_VOTE 13 23*c66ec88fSEmmanuel Vadot #define RPM_CLK_SRC 14 24*c66ec88fSEmmanuel Vadot #define GCC_BIMC_CLK 15 25*c66ec88fSEmmanuel Vadot #define BIMC_DDR_CPLL0_ROOT_CLK_SRC 16 26*c66ec88fSEmmanuel Vadot #define KPSS_AHB_CLK_SRC 17 27*c66ec88fSEmmanuel Vadot #define QDSS_AT_CLK_SRC 18 28*c66ec88fSEmmanuel Vadot #define USB30_MASTER_CLK_SRC 19 29*c66ec88fSEmmanuel Vadot #define BIMC_DDR_CPLL1_ROOT_CLK_SRC 20 30*c66ec88fSEmmanuel Vadot #define QDSS_STM_CLK_SRC 21 31*c66ec88fSEmmanuel Vadot #define ACC_CLK_SRC 22 32*c66ec88fSEmmanuel Vadot #define SEC_CTRL_CLK_SRC 23 33*c66ec88fSEmmanuel Vadot #define BLSP1_QUP1_I2C_APPS_CLK_SRC 24 34*c66ec88fSEmmanuel Vadot #define BLSP1_QUP1_SPI_APPS_CLK_SRC 25 35*c66ec88fSEmmanuel Vadot #define BLSP1_QUP2_I2C_APPS_CLK_SRC 26 36*c66ec88fSEmmanuel Vadot #define BLSP1_QUP2_SPI_APPS_CLK_SRC 27 37*c66ec88fSEmmanuel Vadot #define BLSP1_QUP3_I2C_APPS_CLK_SRC 28 38*c66ec88fSEmmanuel Vadot #define BLSP1_QUP3_SPI_APPS_CLK_SRC 29 39*c66ec88fSEmmanuel Vadot #define BLSP1_QUP4_I2C_APPS_CLK_SRC 30 40*c66ec88fSEmmanuel Vadot #define BLSP1_QUP4_SPI_APPS_CLK_SRC 31 41*c66ec88fSEmmanuel Vadot #define BLSP1_QUP5_I2C_APPS_CLK_SRC 32 42*c66ec88fSEmmanuel Vadot #define BLSP1_QUP5_SPI_APPS_CLK_SRC 33 43*c66ec88fSEmmanuel Vadot #define BLSP1_QUP6_I2C_APPS_CLK_SRC 34 44*c66ec88fSEmmanuel Vadot #define BLSP1_QUP6_SPI_APPS_CLK_SRC 35 45*c66ec88fSEmmanuel Vadot #define BLSP1_UART1_APPS_CLK_SRC 36 46*c66ec88fSEmmanuel Vadot #define BLSP1_UART2_APPS_CLK_SRC 37 47*c66ec88fSEmmanuel Vadot #define BLSP1_UART3_APPS_CLK_SRC 38 48*c66ec88fSEmmanuel Vadot #define BLSP1_UART4_APPS_CLK_SRC 39 49*c66ec88fSEmmanuel Vadot #define BLSP1_UART5_APPS_CLK_SRC 40 50*c66ec88fSEmmanuel Vadot #define BLSP1_UART6_APPS_CLK_SRC 41 51*c66ec88fSEmmanuel Vadot #define BLSP2_QUP1_I2C_APPS_CLK_SRC 42 52*c66ec88fSEmmanuel Vadot #define BLSP2_QUP1_SPI_APPS_CLK_SRC 43 53*c66ec88fSEmmanuel Vadot #define BLSP2_QUP2_I2C_APPS_CLK_SRC 44 54*c66ec88fSEmmanuel Vadot #define BLSP2_QUP2_SPI_APPS_CLK_SRC 45 55*c66ec88fSEmmanuel Vadot #define BLSP2_QUP3_I2C_APPS_CLK_SRC 46 56*c66ec88fSEmmanuel Vadot #define BLSP2_QUP3_SPI_APPS_CLK_SRC 47 57*c66ec88fSEmmanuel Vadot #define BLSP2_QUP4_I2C_APPS_CLK_SRC 48 58*c66ec88fSEmmanuel Vadot #define BLSP2_QUP4_SPI_APPS_CLK_SRC 49 59*c66ec88fSEmmanuel Vadot #define BLSP2_QUP5_I2C_APPS_CLK_SRC 50 60*c66ec88fSEmmanuel Vadot #define BLSP2_QUP5_SPI_APPS_CLK_SRC 51 61*c66ec88fSEmmanuel Vadot #define BLSP2_QUP6_I2C_APPS_CLK_SRC 52 62*c66ec88fSEmmanuel Vadot #define BLSP2_QUP6_SPI_APPS_CLK_SRC 53 63*c66ec88fSEmmanuel Vadot #define BLSP2_UART1_APPS_CLK_SRC 54 64*c66ec88fSEmmanuel Vadot #define BLSP2_UART2_APPS_CLK_SRC 55 65*c66ec88fSEmmanuel Vadot #define BLSP2_UART3_APPS_CLK_SRC 56 66*c66ec88fSEmmanuel Vadot #define BLSP2_UART4_APPS_CLK_SRC 57 67*c66ec88fSEmmanuel Vadot #define BLSP2_UART5_APPS_CLK_SRC 58 68*c66ec88fSEmmanuel Vadot #define BLSP2_UART6_APPS_CLK_SRC 59 69*c66ec88fSEmmanuel Vadot #define CE1_CLK_SRC 60 70*c66ec88fSEmmanuel Vadot #define CE2_CLK_SRC 61 71*c66ec88fSEmmanuel Vadot #define GP1_CLK_SRC 62 72*c66ec88fSEmmanuel Vadot #define GP2_CLK_SRC 63 73*c66ec88fSEmmanuel Vadot #define GP3_CLK_SRC 64 74*c66ec88fSEmmanuel Vadot #define PDM2_CLK_SRC 65 75*c66ec88fSEmmanuel Vadot #define QDSS_TRACECLKIN_CLK_SRC 66 76*c66ec88fSEmmanuel Vadot #define RBCPR_CLK_SRC 67 77*c66ec88fSEmmanuel Vadot #define SDCC1_APPS_CLK_SRC 68 78*c66ec88fSEmmanuel Vadot #define SDCC2_APPS_CLK_SRC 69 79*c66ec88fSEmmanuel Vadot #define SDCC3_APPS_CLK_SRC 70 80*c66ec88fSEmmanuel Vadot #define SDCC4_APPS_CLK_SRC 71 81*c66ec88fSEmmanuel Vadot #define SPMI_AHB_CLK_SRC 72 82*c66ec88fSEmmanuel Vadot #define SPMI_SER_CLK_SRC 73 83*c66ec88fSEmmanuel Vadot #define TSIF_REF_CLK_SRC 74 84*c66ec88fSEmmanuel Vadot #define USB30_MOCK_UTMI_CLK_SRC 75 85*c66ec88fSEmmanuel Vadot #define USB_HS_SYSTEM_CLK_SRC 76 86*c66ec88fSEmmanuel Vadot #define USB_HSIC_CLK_SRC 77 87*c66ec88fSEmmanuel Vadot #define USB_HSIC_IO_CAL_CLK_SRC 78 88*c66ec88fSEmmanuel Vadot #define USB_HSIC_SYSTEM_CLK_SRC 79 89*c66ec88fSEmmanuel Vadot #define GCC_BAM_DMA_AHB_CLK 80 90*c66ec88fSEmmanuel Vadot #define GCC_BAM_DMA_INACTIVITY_TIMERS_CLK 81 91*c66ec88fSEmmanuel Vadot #define GCC_BIMC_CFG_AHB_CLK 82 92*c66ec88fSEmmanuel Vadot #define GCC_BIMC_KPSS_AXI_CLK 83 93*c66ec88fSEmmanuel Vadot #define GCC_BIMC_SLEEP_CLK 84 94*c66ec88fSEmmanuel Vadot #define GCC_BIMC_SYSNOC_AXI_CLK 85 95*c66ec88fSEmmanuel Vadot #define GCC_BIMC_XO_CLK 86 96*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_AHB_CLK 87 97*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_SLEEP_CLK 88 98*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP1_I2C_APPS_CLK 89 99*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP1_SPI_APPS_CLK 90 100*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP2_I2C_APPS_CLK 91 101*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP2_SPI_APPS_CLK 92 102*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP3_I2C_APPS_CLK 93 103*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP3_SPI_APPS_CLK 94 104*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP4_I2C_APPS_CLK 95 105*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP4_SPI_APPS_CLK 96 106*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP5_I2C_APPS_CLK 97 107*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP5_SPI_APPS_CLK 98 108*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP6_I2C_APPS_CLK 99 109*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP6_SPI_APPS_CLK 100 110*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART1_APPS_CLK 101 111*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART1_SIM_CLK 102 112*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART2_APPS_CLK 103 113*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART2_SIM_CLK 104 114*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART3_APPS_CLK 105 115*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART3_SIM_CLK 106 116*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART4_APPS_CLK 107 117*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART4_SIM_CLK 108 118*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART5_APPS_CLK 109 119*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART5_SIM_CLK 110 120*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART6_APPS_CLK 111 121*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART6_SIM_CLK 112 122*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_AHB_CLK 113 123*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_SLEEP_CLK 114 124*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP1_I2C_APPS_CLK 115 125*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP1_SPI_APPS_CLK 116 126*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP2_I2C_APPS_CLK 117 127*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP2_SPI_APPS_CLK 118 128*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP3_I2C_APPS_CLK 119 129*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP3_SPI_APPS_CLK 120 130*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP4_I2C_APPS_CLK 121 131*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP4_SPI_APPS_CLK 122 132*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP5_I2C_APPS_CLK 123 133*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP5_SPI_APPS_CLK 124 134*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP6_I2C_APPS_CLK 125 135*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP6_SPI_APPS_CLK 126 136*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART1_APPS_CLK 127 137*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART1_SIM_CLK 128 138*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART2_APPS_CLK 129 139*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART2_SIM_CLK 130 140*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART3_APPS_CLK 131 141*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART3_SIM_CLK 132 142*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART4_APPS_CLK 133 143*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART4_SIM_CLK 134 144*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART5_APPS_CLK 135 145*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART5_SIM_CLK 136 146*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART6_APPS_CLK 137 147*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART6_SIM_CLK 138 148*c66ec88fSEmmanuel Vadot #define GCC_BOOT_ROM_AHB_CLK 139 149*c66ec88fSEmmanuel Vadot #define GCC_CE1_AHB_CLK 140 150*c66ec88fSEmmanuel Vadot #define GCC_CE1_AXI_CLK 141 151*c66ec88fSEmmanuel Vadot #define GCC_CE1_CLK 142 152*c66ec88fSEmmanuel Vadot #define GCC_CE2_AHB_CLK 143 153*c66ec88fSEmmanuel Vadot #define GCC_CE2_AXI_CLK 144 154*c66ec88fSEmmanuel Vadot #define GCC_CE2_CLK 145 155*c66ec88fSEmmanuel Vadot #define GCC_CNOC_BUS_TIMEOUT0_AHB_CLK 146 156*c66ec88fSEmmanuel Vadot #define GCC_CNOC_BUS_TIMEOUT1_AHB_CLK 147 157*c66ec88fSEmmanuel Vadot #define GCC_CNOC_BUS_TIMEOUT2_AHB_CLK 148 158*c66ec88fSEmmanuel Vadot #define GCC_CNOC_BUS_TIMEOUT3_AHB_CLK 149 159*c66ec88fSEmmanuel Vadot #define GCC_CNOC_BUS_TIMEOUT4_AHB_CLK 150 160*c66ec88fSEmmanuel Vadot #define GCC_CNOC_BUS_TIMEOUT5_AHB_CLK 151 161*c66ec88fSEmmanuel Vadot #define GCC_CNOC_BUS_TIMEOUT6_AHB_CLK 152 162*c66ec88fSEmmanuel Vadot #define GCC_CFG_NOC_AHB_CLK 153 163*c66ec88fSEmmanuel Vadot #define GCC_CFG_NOC_DDR_CFG_CLK 154 164*c66ec88fSEmmanuel Vadot #define GCC_CFG_NOC_RPM_AHB_CLK 155 165*c66ec88fSEmmanuel Vadot #define GCC_BIMC_DDR_CPLL0_CLK 156 166*c66ec88fSEmmanuel Vadot #define GCC_BIMC_DDR_CPLL1_CLK 157 167*c66ec88fSEmmanuel Vadot #define GCC_DDR_DIM_CFG_CLK 158 168*c66ec88fSEmmanuel Vadot #define GCC_DDR_DIM_SLEEP_CLK 159 169*c66ec88fSEmmanuel Vadot #define GCC_DEHR_CLK 160 170*c66ec88fSEmmanuel Vadot #define GCC_AHB_CLK 161 171*c66ec88fSEmmanuel Vadot #define GCC_IM_SLEEP_CLK 162 172*c66ec88fSEmmanuel Vadot #define GCC_XO_CLK 163 173*c66ec88fSEmmanuel Vadot #define GCC_XO_DIV4_CLK 164 174*c66ec88fSEmmanuel Vadot #define GCC_GP1_CLK 165 175*c66ec88fSEmmanuel Vadot #define GCC_GP2_CLK 166 176*c66ec88fSEmmanuel Vadot #define GCC_GP3_CLK 167 177*c66ec88fSEmmanuel Vadot #define GCC_IMEM_AXI_CLK 168 178*c66ec88fSEmmanuel Vadot #define GCC_IMEM_CFG_AHB_CLK 169 179*c66ec88fSEmmanuel Vadot #define GCC_KPSS_AHB_CLK 170 180*c66ec88fSEmmanuel Vadot #define GCC_KPSS_AXI_CLK 171 181*c66ec88fSEmmanuel Vadot #define GCC_LPASS_Q6_AXI_CLK 172 182*c66ec88fSEmmanuel Vadot #define GCC_MMSS_NOC_AT_CLK 173 183*c66ec88fSEmmanuel Vadot #define GCC_MMSS_NOC_CFG_AHB_CLK 174 184*c66ec88fSEmmanuel Vadot #define GCC_OCMEM_NOC_CFG_AHB_CLK 175 185*c66ec88fSEmmanuel Vadot #define GCC_OCMEM_SYS_NOC_AXI_CLK 176 186*c66ec88fSEmmanuel Vadot #define GCC_MPM_AHB_CLK 177 187*c66ec88fSEmmanuel Vadot #define GCC_MSG_RAM_AHB_CLK 178 188*c66ec88fSEmmanuel Vadot #define GCC_MSS_CFG_AHB_CLK 179 189*c66ec88fSEmmanuel Vadot #define GCC_MSS_Q6_BIMC_AXI_CLK 180 190*c66ec88fSEmmanuel Vadot #define GCC_NOC_CONF_XPU_AHB_CLK 181 191*c66ec88fSEmmanuel Vadot #define GCC_PDM2_CLK 182 192*c66ec88fSEmmanuel Vadot #define GCC_PDM_AHB_CLK 183 193*c66ec88fSEmmanuel Vadot #define GCC_PDM_XO4_CLK 184 194*c66ec88fSEmmanuel Vadot #define GCC_PERIPH_NOC_AHB_CLK 185 195*c66ec88fSEmmanuel Vadot #define GCC_PERIPH_NOC_AT_CLK 186 196*c66ec88fSEmmanuel Vadot #define GCC_PERIPH_NOC_CFG_AHB_CLK 187 197*c66ec88fSEmmanuel Vadot #define GCC_PERIPH_NOC_MPU_CFG_AHB_CLK 188 198*c66ec88fSEmmanuel Vadot #define GCC_PERIPH_XPU_AHB_CLK 189 199*c66ec88fSEmmanuel Vadot #define GCC_PNOC_BUS_TIMEOUT0_AHB_CLK 190 200*c66ec88fSEmmanuel Vadot #define GCC_PNOC_BUS_TIMEOUT1_AHB_CLK 191 201*c66ec88fSEmmanuel Vadot #define GCC_PNOC_BUS_TIMEOUT2_AHB_CLK 192 202*c66ec88fSEmmanuel Vadot #define GCC_PNOC_BUS_TIMEOUT3_AHB_CLK 193 203*c66ec88fSEmmanuel Vadot #define GCC_PNOC_BUS_TIMEOUT4_AHB_CLK 194 204*c66ec88fSEmmanuel Vadot #define GCC_PRNG_AHB_CLK 195 205*c66ec88fSEmmanuel Vadot #define GCC_QDSS_AT_CLK 196 206*c66ec88fSEmmanuel Vadot #define GCC_QDSS_CFG_AHB_CLK 197 207*c66ec88fSEmmanuel Vadot #define GCC_QDSS_DAP_AHB_CLK 198 208*c66ec88fSEmmanuel Vadot #define GCC_QDSS_DAP_CLK 199 209*c66ec88fSEmmanuel Vadot #define GCC_QDSS_ETR_USB_CLK 200 210*c66ec88fSEmmanuel Vadot #define GCC_QDSS_STM_CLK 201 211*c66ec88fSEmmanuel Vadot #define GCC_QDSS_TRACECLKIN_CLK 202 212*c66ec88fSEmmanuel Vadot #define GCC_QDSS_TSCTR_DIV16_CLK 203 213*c66ec88fSEmmanuel Vadot #define GCC_QDSS_TSCTR_DIV2_CLK 204 214*c66ec88fSEmmanuel Vadot #define GCC_QDSS_TSCTR_DIV3_CLK 205 215*c66ec88fSEmmanuel Vadot #define GCC_QDSS_TSCTR_DIV4_CLK 206 216*c66ec88fSEmmanuel Vadot #define GCC_QDSS_TSCTR_DIV8_CLK 207 217*c66ec88fSEmmanuel Vadot #define GCC_QDSS_RBCPR_XPU_AHB_CLK 208 218*c66ec88fSEmmanuel Vadot #define GCC_RBCPR_AHB_CLK 209 219*c66ec88fSEmmanuel Vadot #define GCC_RBCPR_CLK 210 220*c66ec88fSEmmanuel Vadot #define GCC_RPM_BUS_AHB_CLK 211 221*c66ec88fSEmmanuel Vadot #define GCC_RPM_PROC_HCLK 212 222*c66ec88fSEmmanuel Vadot #define GCC_RPM_SLEEP_CLK 213 223*c66ec88fSEmmanuel Vadot #define GCC_RPM_TIMER_CLK 214 224*c66ec88fSEmmanuel Vadot #define GCC_SDCC1_AHB_CLK 215 225*c66ec88fSEmmanuel Vadot #define GCC_SDCC1_APPS_CLK 216 226*c66ec88fSEmmanuel Vadot #define GCC_SDCC1_INACTIVITY_TIMERS_CLK 217 227*c66ec88fSEmmanuel Vadot #define GCC_SDCC2_AHB_CLK 218 228*c66ec88fSEmmanuel Vadot #define GCC_SDCC2_APPS_CLK 219 229*c66ec88fSEmmanuel Vadot #define GCC_SDCC2_INACTIVITY_TIMERS_CLK 220 230*c66ec88fSEmmanuel Vadot #define GCC_SDCC3_AHB_CLK 221 231*c66ec88fSEmmanuel Vadot #define GCC_SDCC3_APPS_CLK 222 232*c66ec88fSEmmanuel Vadot #define GCC_SDCC3_INACTIVITY_TIMERS_CLK 223 233*c66ec88fSEmmanuel Vadot #define GCC_SDCC4_AHB_CLK 224 234*c66ec88fSEmmanuel Vadot #define GCC_SDCC4_APPS_CLK 225 235*c66ec88fSEmmanuel Vadot #define GCC_SDCC4_INACTIVITY_TIMERS_CLK 226 236*c66ec88fSEmmanuel Vadot #define GCC_SEC_CTRL_ACC_CLK 227 237*c66ec88fSEmmanuel Vadot #define GCC_SEC_CTRL_AHB_CLK 228 238*c66ec88fSEmmanuel Vadot #define GCC_SEC_CTRL_BOOT_ROM_PATCH_CLK 229 239*c66ec88fSEmmanuel Vadot #define GCC_SEC_CTRL_CLK 230 240*c66ec88fSEmmanuel Vadot #define GCC_SEC_CTRL_SENSE_CLK 231 241*c66ec88fSEmmanuel Vadot #define GCC_SNOC_BUS_TIMEOUT0_AHB_CLK 232 242*c66ec88fSEmmanuel Vadot #define GCC_SNOC_BUS_TIMEOUT2_AHB_CLK 233 243*c66ec88fSEmmanuel Vadot #define GCC_SPDM_BIMC_CY_CLK 234 244*c66ec88fSEmmanuel Vadot #define GCC_SPDM_CFG_AHB_CLK 235 245*c66ec88fSEmmanuel Vadot #define GCC_SPDM_DEBUG_CY_CLK 236 246*c66ec88fSEmmanuel Vadot #define GCC_SPDM_FF_CLK 237 247*c66ec88fSEmmanuel Vadot #define GCC_SPDM_MSTR_AHB_CLK 238 248*c66ec88fSEmmanuel Vadot #define GCC_SPDM_PNOC_CY_CLK 239 249*c66ec88fSEmmanuel Vadot #define GCC_SPDM_RPM_CY_CLK 240 250*c66ec88fSEmmanuel Vadot #define GCC_SPDM_SNOC_CY_CLK 241 251*c66ec88fSEmmanuel Vadot #define GCC_SPMI_AHB_CLK 242 252*c66ec88fSEmmanuel Vadot #define GCC_SPMI_CNOC_AHB_CLK 243 253*c66ec88fSEmmanuel Vadot #define GCC_SPMI_SER_CLK 244 254*c66ec88fSEmmanuel Vadot #define GCC_SNOC_CNOC_AHB_CLK 245 255*c66ec88fSEmmanuel Vadot #define GCC_SNOC_PNOC_AHB_CLK 246 256*c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_AT_CLK 247 257*c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_AXI_CLK 248 258*c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_KPSS_AHB_CLK 249 259*c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_QDSS_STM_AXI_CLK 250 260*c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_USB3_AXI_CLK 251 261*c66ec88fSEmmanuel Vadot #define GCC_TCSR_AHB_CLK 252 262*c66ec88fSEmmanuel Vadot #define GCC_TLMM_AHB_CLK 253 263*c66ec88fSEmmanuel Vadot #define GCC_TLMM_CLK 254 264*c66ec88fSEmmanuel Vadot #define GCC_TSIF_AHB_CLK 255 265*c66ec88fSEmmanuel Vadot #define GCC_TSIF_INACTIVITY_TIMERS_CLK 256 266*c66ec88fSEmmanuel Vadot #define GCC_TSIF_REF_CLK 257 267*c66ec88fSEmmanuel Vadot #define GCC_USB2A_PHY_SLEEP_CLK 258 268*c66ec88fSEmmanuel Vadot #define GCC_USB2B_PHY_SLEEP_CLK 259 269*c66ec88fSEmmanuel Vadot #define GCC_USB30_MASTER_CLK 260 270*c66ec88fSEmmanuel Vadot #define GCC_USB30_MOCK_UTMI_CLK 261 271*c66ec88fSEmmanuel Vadot #define GCC_USB30_SLEEP_CLK 262 272*c66ec88fSEmmanuel Vadot #define GCC_USB_HS_AHB_CLK 263 273*c66ec88fSEmmanuel Vadot #define GCC_USB_HS_INACTIVITY_TIMERS_CLK 264 274*c66ec88fSEmmanuel Vadot #define GCC_USB_HS_SYSTEM_CLK 265 275*c66ec88fSEmmanuel Vadot #define GCC_USB_HSIC_AHB_CLK 266 276*c66ec88fSEmmanuel Vadot #define GCC_USB_HSIC_CLK 267 277*c66ec88fSEmmanuel Vadot #define GCC_USB_HSIC_IO_CAL_CLK 268 278*c66ec88fSEmmanuel Vadot #define GCC_USB_HSIC_IO_CAL_SLEEP_CLK 269 279*c66ec88fSEmmanuel Vadot #define GCC_USB_HSIC_SYSTEM_CLK 270 280*c66ec88fSEmmanuel Vadot #define GCC_WCSS_GPLL1_CLK_SRC 271 281*c66ec88fSEmmanuel Vadot #define GCC_MMSS_GPLL0_CLK_SRC 272 282*c66ec88fSEmmanuel Vadot #define GCC_LPASS_GPLL0_CLK_SRC 273 283*c66ec88fSEmmanuel Vadot #define GCC_WCSS_GPLL1_CLK_SRC_SLEEP_ENA 274 284*c66ec88fSEmmanuel Vadot #define GCC_MMSS_GPLL0_CLK_SRC_SLEEP_ENA 275 285*c66ec88fSEmmanuel Vadot #define GCC_LPASS_GPLL0_CLK_SRC_SLEEP_ENA 276 286*c66ec88fSEmmanuel Vadot #define GCC_IMEM_AXI_CLK_SLEEP_ENA 277 287*c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_KPSS_AHB_CLK_SLEEP_ENA 278 288*c66ec88fSEmmanuel Vadot #define GCC_BIMC_KPSS_AXI_CLK_SLEEP_ENA 279 289*c66ec88fSEmmanuel Vadot #define GCC_KPSS_AHB_CLK_SLEEP_ENA 280 290*c66ec88fSEmmanuel Vadot #define GCC_KPSS_AXI_CLK_SLEEP_ENA 281 291*c66ec88fSEmmanuel Vadot #define GCC_MPM_AHB_CLK_SLEEP_ENA 282 292*c66ec88fSEmmanuel Vadot #define GCC_OCMEM_SYS_NOC_AXI_CLK_SLEEP_ENA 283 293*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_AHB_CLK_SLEEP_ENA 284 294*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_SLEEP_CLK_SLEEP_ENA 285 295*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_AHB_CLK_SLEEP_ENA 286 296*c66ec88fSEmmanuel Vadot #define GCC_BLSP2_SLEEP_CLK_SLEEP_ENA 287 297*c66ec88fSEmmanuel Vadot #define GCC_PRNG_AHB_CLK_SLEEP_ENA 288 298*c66ec88fSEmmanuel Vadot #define GCC_BAM_DMA_AHB_CLK_SLEEP_ENA 289 299*c66ec88fSEmmanuel Vadot #define GCC_BAM_DMA_INACTIVITY_TIMERS_CLK_SLEEP_ENA 290 300*c66ec88fSEmmanuel Vadot #define GCC_BOOT_ROM_AHB_CLK_SLEEP_ENA 291 301*c66ec88fSEmmanuel Vadot #define GCC_MSG_RAM_AHB_CLK_SLEEP_ENA 292 302*c66ec88fSEmmanuel Vadot #define GCC_TLMM_AHB_CLK_SLEEP_ENA 293 303*c66ec88fSEmmanuel Vadot #define GCC_TLMM_CLK_SLEEP_ENA 294 304*c66ec88fSEmmanuel Vadot #define GCC_SPMI_CNOC_AHB_CLK_SLEEP_ENA 295 305*c66ec88fSEmmanuel Vadot #define GCC_CE1_CLK_SLEEP_ENA 296 306*c66ec88fSEmmanuel Vadot #define GCC_CE1_AXI_CLK_SLEEP_ENA 297 307*c66ec88fSEmmanuel Vadot #define GCC_CE1_AHB_CLK_SLEEP_ENA 298 308*c66ec88fSEmmanuel Vadot #define GCC_CE2_CLK_SLEEP_ENA 299 309*c66ec88fSEmmanuel Vadot #define GCC_CE2_AXI_CLK_SLEEP_ENA 300 310*c66ec88fSEmmanuel Vadot #define GCC_CE2_AHB_CLK_SLEEP_ENA 301 311*c66ec88fSEmmanuel Vadot #define GPLL4 302 312*c66ec88fSEmmanuel Vadot #define GPLL4_VOTE 303 313*c66ec88fSEmmanuel Vadot #define GCC_SDCC1_CDCCAL_SLEEP_CLK 304 314*c66ec88fSEmmanuel Vadot #define GCC_SDCC1_CDCCAL_FF_CLK 305 315*c66ec88fSEmmanuel Vadot 316*c66ec88fSEmmanuel Vadot /* gdscs */ 317*c66ec88fSEmmanuel Vadot #define USB_HS_HSIC_GDSC 0 318*c66ec88fSEmmanuel Vadot 319*c66ec88fSEmmanuel Vadot #endif 320