xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/qcom,gcc-ipq6018.h (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */
2*c66ec88fSEmmanuel Vadot /*
3*c66ec88fSEmmanuel Vadot  * Copyright (c) 2018, The Linux Foundation. All rights reserved.
4*c66ec88fSEmmanuel Vadot  */
5*c66ec88fSEmmanuel Vadot 
6*c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_CLOCK_IPQ_GCC_6018_H
7*c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_CLOCK_IPQ_GCC_6018_H
8*c66ec88fSEmmanuel Vadot 
9*c66ec88fSEmmanuel Vadot #define GPLL0					0
10*c66ec88fSEmmanuel Vadot #define UBI32_PLL				1
11*c66ec88fSEmmanuel Vadot #define GPLL6					2
12*c66ec88fSEmmanuel Vadot #define GPLL4					3
13*c66ec88fSEmmanuel Vadot #define PCNOC_BFDCD_CLK_SRC			4
14*c66ec88fSEmmanuel Vadot #define GPLL2					5
15*c66ec88fSEmmanuel Vadot #define NSS_CRYPTO_PLL				6
16*c66ec88fSEmmanuel Vadot #define NSS_PPE_CLK_SRC				7
17*c66ec88fSEmmanuel Vadot #define GCC_XO_CLK_SRC				8
18*c66ec88fSEmmanuel Vadot #define NSS_CE_CLK_SRC				9
19*c66ec88fSEmmanuel Vadot #define GCC_SLEEP_CLK_SRC			10
20*c66ec88fSEmmanuel Vadot #define APSS_AHB_CLK_SRC			11
21*c66ec88fSEmmanuel Vadot #define NSS_PORT5_RX_CLK_SRC			12
22*c66ec88fSEmmanuel Vadot #define NSS_PORT5_TX_CLK_SRC			13
23*c66ec88fSEmmanuel Vadot #define PCIE0_AXI_CLK_SRC			14
24*c66ec88fSEmmanuel Vadot #define USB0_MASTER_CLK_SRC			15
25*c66ec88fSEmmanuel Vadot #define APSS_AHB_POSTDIV_CLK_SRC		16
26*c66ec88fSEmmanuel Vadot #define NSS_PORT1_RX_CLK_SRC			17
27*c66ec88fSEmmanuel Vadot #define NSS_PORT1_TX_CLK_SRC			18
28*c66ec88fSEmmanuel Vadot #define NSS_PORT2_RX_CLK_SRC			19
29*c66ec88fSEmmanuel Vadot #define NSS_PORT2_TX_CLK_SRC			20
30*c66ec88fSEmmanuel Vadot #define NSS_PORT3_RX_CLK_SRC			21
31*c66ec88fSEmmanuel Vadot #define NSS_PORT3_TX_CLK_SRC			22
32*c66ec88fSEmmanuel Vadot #define NSS_PORT4_RX_CLK_SRC			23
33*c66ec88fSEmmanuel Vadot #define NSS_PORT4_TX_CLK_SRC			24
34*c66ec88fSEmmanuel Vadot #define NSS_PORT5_RX_DIV_CLK_SRC		25
35*c66ec88fSEmmanuel Vadot #define NSS_PORT5_TX_DIV_CLK_SRC		26
36*c66ec88fSEmmanuel Vadot #define APSS_AXI_CLK_SRC			27
37*c66ec88fSEmmanuel Vadot #define NSS_CRYPTO_CLK_SRC			28
38*c66ec88fSEmmanuel Vadot #define NSS_PORT1_RX_DIV_CLK_SRC		29
39*c66ec88fSEmmanuel Vadot #define NSS_PORT1_TX_DIV_CLK_SRC		30
40*c66ec88fSEmmanuel Vadot #define NSS_PORT2_RX_DIV_CLK_SRC		31
41*c66ec88fSEmmanuel Vadot #define NSS_PORT2_TX_DIV_CLK_SRC		32
42*c66ec88fSEmmanuel Vadot #define NSS_PORT3_RX_DIV_CLK_SRC		33
43*c66ec88fSEmmanuel Vadot #define NSS_PORT3_TX_DIV_CLK_SRC		34
44*c66ec88fSEmmanuel Vadot #define NSS_PORT4_RX_DIV_CLK_SRC		35
45*c66ec88fSEmmanuel Vadot #define NSS_PORT4_TX_DIV_CLK_SRC		36
46*c66ec88fSEmmanuel Vadot #define NSS_UBI0_CLK_SRC			37
47*c66ec88fSEmmanuel Vadot #define BLSP1_QUP1_I2C_APPS_CLK_SRC		38
48*c66ec88fSEmmanuel Vadot #define BLSP1_QUP1_SPI_APPS_CLK_SRC		39
49*c66ec88fSEmmanuel Vadot #define BLSP1_QUP2_I2C_APPS_CLK_SRC		40
50*c66ec88fSEmmanuel Vadot #define BLSP1_QUP2_SPI_APPS_CLK_SRC		41
51*c66ec88fSEmmanuel Vadot #define BLSP1_QUP3_I2C_APPS_CLK_SRC		42
52*c66ec88fSEmmanuel Vadot #define BLSP1_QUP3_SPI_APPS_CLK_SRC		43
53*c66ec88fSEmmanuel Vadot #define BLSP1_QUP4_I2C_APPS_CLK_SRC		44
54*c66ec88fSEmmanuel Vadot #define BLSP1_QUP4_SPI_APPS_CLK_SRC		45
55*c66ec88fSEmmanuel Vadot #define BLSP1_QUP5_I2C_APPS_CLK_SRC		46
56*c66ec88fSEmmanuel Vadot #define BLSP1_QUP5_SPI_APPS_CLK_SRC		47
57*c66ec88fSEmmanuel Vadot #define BLSP1_QUP6_I2C_APPS_CLK_SRC		48
58*c66ec88fSEmmanuel Vadot #define BLSP1_QUP6_SPI_APPS_CLK_SRC		49
59*c66ec88fSEmmanuel Vadot #define BLSP1_UART1_APPS_CLK_SRC		50
60*c66ec88fSEmmanuel Vadot #define BLSP1_UART2_APPS_CLK_SRC		51
61*c66ec88fSEmmanuel Vadot #define BLSP1_UART3_APPS_CLK_SRC		52
62*c66ec88fSEmmanuel Vadot #define BLSP1_UART4_APPS_CLK_SRC		53
63*c66ec88fSEmmanuel Vadot #define BLSP1_UART5_APPS_CLK_SRC		54
64*c66ec88fSEmmanuel Vadot #define BLSP1_UART6_APPS_CLK_SRC		55
65*c66ec88fSEmmanuel Vadot #define CRYPTO_CLK_SRC				56
66*c66ec88fSEmmanuel Vadot #define NSS_UBI0_DIV_CLK_SRC			57
67*c66ec88fSEmmanuel Vadot #define PCIE0_AUX_CLK_SRC			58
68*c66ec88fSEmmanuel Vadot #define PCIE0_PIPE_CLK_SRC			59
69*c66ec88fSEmmanuel Vadot #define SDCC1_APPS_CLK_SRC			60
70*c66ec88fSEmmanuel Vadot #define USB0_AUX_CLK_SRC			61
71*c66ec88fSEmmanuel Vadot #define USB0_MOCK_UTMI_CLK_SRC			62
72*c66ec88fSEmmanuel Vadot #define USB0_PIPE_CLK_SRC			63
73*c66ec88fSEmmanuel Vadot #define USB1_MOCK_UTMI_CLK_SRC			64
74*c66ec88fSEmmanuel Vadot #define GCC_APSS_AHB_CLK			65
75*c66ec88fSEmmanuel Vadot #define GCC_APSS_AXI_CLK			66
76*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_AHB_CLK			67
77*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP1_I2C_APPS_CLK		68
78*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP1_SPI_APPS_CLK		69
79*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP2_I2C_APPS_CLK		70
80*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP2_SPI_APPS_CLK		71
81*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP3_I2C_APPS_CLK		72
82*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP3_SPI_APPS_CLK		73
83*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP4_I2C_APPS_CLK		74
84*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP4_SPI_APPS_CLK		75
85*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP5_I2C_APPS_CLK		76
86*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP5_SPI_APPS_CLK		77
87*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP6_I2C_APPS_CLK		78
88*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP6_SPI_APPS_CLK		79
89*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART1_APPS_CLK		80
90*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART2_APPS_CLK		81
91*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART3_APPS_CLK		82
92*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART4_APPS_CLK		83
93*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART5_APPS_CLK		84
94*c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART6_APPS_CLK		85
95*c66ec88fSEmmanuel Vadot #define GCC_CRYPTO_AHB_CLK			86
96*c66ec88fSEmmanuel Vadot #define GCC_CRYPTO_AXI_CLK			87
97*c66ec88fSEmmanuel Vadot #define GCC_CRYPTO_CLK				88
98*c66ec88fSEmmanuel Vadot #define GCC_XO_CLK				89
99*c66ec88fSEmmanuel Vadot #define GCC_XO_DIV4_CLK				90
100*c66ec88fSEmmanuel Vadot #define GCC_MDIO_AHB_CLK			91
101*c66ec88fSEmmanuel Vadot #define GCC_CRYPTO_PPE_CLK			92
102*c66ec88fSEmmanuel Vadot #define GCC_NSS_CE_APB_CLK			93
103*c66ec88fSEmmanuel Vadot #define GCC_NSS_CE_AXI_CLK			94
104*c66ec88fSEmmanuel Vadot #define GCC_NSS_CFG_CLK				95
105*c66ec88fSEmmanuel Vadot #define GCC_NSS_CRYPTO_CLK			96
106*c66ec88fSEmmanuel Vadot #define GCC_NSS_CSR_CLK				97
107*c66ec88fSEmmanuel Vadot #define GCC_NSS_EDMA_CFG_CLK			98
108*c66ec88fSEmmanuel Vadot #define GCC_NSS_EDMA_CLK			99
109*c66ec88fSEmmanuel Vadot #define GCC_NSS_NOC_CLK				100
110*c66ec88fSEmmanuel Vadot #define GCC_NSS_PORT1_RX_CLK			101
111*c66ec88fSEmmanuel Vadot #define GCC_NSS_PORT1_TX_CLK			102
112*c66ec88fSEmmanuel Vadot #define GCC_NSS_PORT2_RX_CLK			103
113*c66ec88fSEmmanuel Vadot #define GCC_NSS_PORT2_TX_CLK			104
114*c66ec88fSEmmanuel Vadot #define GCC_NSS_PORT3_RX_CLK			105
115*c66ec88fSEmmanuel Vadot #define GCC_NSS_PORT3_TX_CLK			106
116*c66ec88fSEmmanuel Vadot #define GCC_NSS_PORT4_RX_CLK			107
117*c66ec88fSEmmanuel Vadot #define GCC_NSS_PORT4_TX_CLK			108
118*c66ec88fSEmmanuel Vadot #define GCC_NSS_PORT5_RX_CLK			109
119*c66ec88fSEmmanuel Vadot #define GCC_NSS_PORT5_TX_CLK			110
120*c66ec88fSEmmanuel Vadot #define GCC_NSS_PPE_CFG_CLK			111
121*c66ec88fSEmmanuel Vadot #define GCC_NSS_PPE_CLK				112
122*c66ec88fSEmmanuel Vadot #define GCC_NSS_PPE_IPE_CLK			113
123*c66ec88fSEmmanuel Vadot #define GCC_NSS_PTP_REF_CLK			114
124*c66ec88fSEmmanuel Vadot #define GCC_NSSNOC_CE_APB_CLK			115
125*c66ec88fSEmmanuel Vadot #define GCC_NSSNOC_CE_AXI_CLK			116
126*c66ec88fSEmmanuel Vadot #define GCC_NSSNOC_CRYPTO_CLK			117
127*c66ec88fSEmmanuel Vadot #define GCC_NSSNOC_PPE_CFG_CLK			118
128*c66ec88fSEmmanuel Vadot #define GCC_NSSNOC_PPE_CLK			119
129*c66ec88fSEmmanuel Vadot #define GCC_NSSNOC_QOSGEN_REF_CLK		120
130*c66ec88fSEmmanuel Vadot #define GCC_NSSNOC_TIMEOUT_REF_CLK		121
131*c66ec88fSEmmanuel Vadot #define GCC_NSSNOC_UBI0_AHB_CLK			122
132*c66ec88fSEmmanuel Vadot #define GCC_PORT1_MAC_CLK			123
133*c66ec88fSEmmanuel Vadot #define GCC_PORT2_MAC_CLK			124
134*c66ec88fSEmmanuel Vadot #define GCC_PORT3_MAC_CLK			125
135*c66ec88fSEmmanuel Vadot #define GCC_PORT4_MAC_CLK			126
136*c66ec88fSEmmanuel Vadot #define GCC_PORT5_MAC_CLK			127
137*c66ec88fSEmmanuel Vadot #define GCC_UBI0_AHB_CLK			128
138*c66ec88fSEmmanuel Vadot #define GCC_UBI0_AXI_CLK			129
139*c66ec88fSEmmanuel Vadot #define GCC_UBI0_CORE_CLK			130
140*c66ec88fSEmmanuel Vadot #define GCC_PCIE0_AHB_CLK			131
141*c66ec88fSEmmanuel Vadot #define GCC_PCIE0_AUX_CLK			132
142*c66ec88fSEmmanuel Vadot #define GCC_PCIE0_AXI_M_CLK			133
143*c66ec88fSEmmanuel Vadot #define GCC_PCIE0_AXI_S_CLK			134
144*c66ec88fSEmmanuel Vadot #define GCC_PCIE0_PIPE_CLK			135
145*c66ec88fSEmmanuel Vadot #define GCC_PRNG_AHB_CLK			136
146*c66ec88fSEmmanuel Vadot #define GCC_QPIC_AHB_CLK			137
147*c66ec88fSEmmanuel Vadot #define GCC_QPIC_CLK				138
148*c66ec88fSEmmanuel Vadot #define GCC_SDCC1_AHB_CLK			139
149*c66ec88fSEmmanuel Vadot #define GCC_SDCC1_APPS_CLK			140
150*c66ec88fSEmmanuel Vadot #define GCC_UNIPHY0_AHB_CLK			141
151*c66ec88fSEmmanuel Vadot #define GCC_UNIPHY0_PORT1_RX_CLK		142
152*c66ec88fSEmmanuel Vadot #define GCC_UNIPHY0_PORT1_TX_CLK		143
153*c66ec88fSEmmanuel Vadot #define GCC_UNIPHY0_PORT2_RX_CLK		144
154*c66ec88fSEmmanuel Vadot #define GCC_UNIPHY0_PORT2_TX_CLK		145
155*c66ec88fSEmmanuel Vadot #define GCC_UNIPHY0_PORT3_RX_CLK		146
156*c66ec88fSEmmanuel Vadot #define GCC_UNIPHY0_PORT3_TX_CLK		147
157*c66ec88fSEmmanuel Vadot #define GCC_UNIPHY0_PORT4_RX_CLK		148
158*c66ec88fSEmmanuel Vadot #define GCC_UNIPHY0_PORT4_TX_CLK		149
159*c66ec88fSEmmanuel Vadot #define GCC_UNIPHY0_PORT5_RX_CLK		150
160*c66ec88fSEmmanuel Vadot #define GCC_UNIPHY0_PORT5_TX_CLK		151
161*c66ec88fSEmmanuel Vadot #define GCC_UNIPHY0_SYS_CLK			152
162*c66ec88fSEmmanuel Vadot #define GCC_UNIPHY1_AHB_CLK			153
163*c66ec88fSEmmanuel Vadot #define GCC_UNIPHY1_PORT5_RX_CLK		154
164*c66ec88fSEmmanuel Vadot #define GCC_UNIPHY1_PORT5_TX_CLK		155
165*c66ec88fSEmmanuel Vadot #define GCC_UNIPHY1_SYS_CLK			156
166*c66ec88fSEmmanuel Vadot #define GCC_USB0_AUX_CLK			157
167*c66ec88fSEmmanuel Vadot #define GCC_USB0_MASTER_CLK			158
168*c66ec88fSEmmanuel Vadot #define GCC_USB0_MOCK_UTMI_CLK			159
169*c66ec88fSEmmanuel Vadot #define GCC_USB0_PHY_CFG_AHB_CLK		160
170*c66ec88fSEmmanuel Vadot #define GCC_USB0_PIPE_CLK			161
171*c66ec88fSEmmanuel Vadot #define GCC_USB0_SLEEP_CLK			162
172*c66ec88fSEmmanuel Vadot #define GCC_USB1_MASTER_CLK			163
173*c66ec88fSEmmanuel Vadot #define GCC_USB1_MOCK_UTMI_CLK			164
174*c66ec88fSEmmanuel Vadot #define GCC_USB1_PHY_CFG_AHB_CLK		165
175*c66ec88fSEmmanuel Vadot #define GCC_USB1_SLEEP_CLK			166
176*c66ec88fSEmmanuel Vadot #define GP1_CLK_SRC				167
177*c66ec88fSEmmanuel Vadot #define GP2_CLK_SRC				168
178*c66ec88fSEmmanuel Vadot #define GP3_CLK_SRC				169
179*c66ec88fSEmmanuel Vadot #define GCC_GP1_CLK				170
180*c66ec88fSEmmanuel Vadot #define GCC_GP2_CLK				171
181*c66ec88fSEmmanuel Vadot #define GCC_GP3_CLK				172
182*c66ec88fSEmmanuel Vadot #define SYSTEM_NOC_BFDCD_CLK_SRC		173
183*c66ec88fSEmmanuel Vadot #define GCC_NSSNOC_SNOC_CLK			174
184*c66ec88fSEmmanuel Vadot #define GCC_UBI0_NC_AXI_CLK			175
185*c66ec88fSEmmanuel Vadot #define GCC_UBI1_NC_AXI_CLK			176
186*c66ec88fSEmmanuel Vadot #define GPLL0_MAIN				177
187*c66ec88fSEmmanuel Vadot #define UBI32_PLL_MAIN				178
188*c66ec88fSEmmanuel Vadot #define GPLL6_MAIN				179
189*c66ec88fSEmmanuel Vadot #define GPLL4_MAIN				180
190*c66ec88fSEmmanuel Vadot #define GPLL2_MAIN				181
191*c66ec88fSEmmanuel Vadot #define NSS_CRYPTO_PLL_MAIN			182
192*c66ec88fSEmmanuel Vadot #define GCC_CMN_12GPLL_AHB_CLK			183
193*c66ec88fSEmmanuel Vadot #define GCC_CMN_12GPLL_SYS_CLK			184
194*c66ec88fSEmmanuel Vadot #define GCC_SNOC_BUS_TIMEOUT2_AHB_CLK		185
195*c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_USB0_AXI_CLK		186
196*c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_PCIE0_AXI_CLK		187
197*c66ec88fSEmmanuel Vadot #define QDSS_TSCTR_CLK_SRC			188
198*c66ec88fSEmmanuel Vadot #define QDSS_AT_CLK_SRC				189
199*c66ec88fSEmmanuel Vadot #define GCC_QDSS_AT_CLK				190
200*c66ec88fSEmmanuel Vadot #define GCC_QDSS_DAP_CLK			191
201*c66ec88fSEmmanuel Vadot #define ADSS_PWM_CLK_SRC			192
202*c66ec88fSEmmanuel Vadot #define GCC_ADSS_PWM_CLK			193
203*c66ec88fSEmmanuel Vadot #define SDCC1_ICE_CORE_CLK_SRC			194
204*c66ec88fSEmmanuel Vadot #define GCC_SDCC1_ICE_CORE_CLK			195
205*c66ec88fSEmmanuel Vadot #define GCC_DCC_CLK				196
206*c66ec88fSEmmanuel Vadot #define PCIE0_RCHNG_CLK_SRC			197
207*c66ec88fSEmmanuel Vadot #define GCC_PCIE0_AXI_S_BRIDGE_CLK		198
208*c66ec88fSEmmanuel Vadot #define PCIE0_RCHNG_CLK				199
209*c66ec88fSEmmanuel Vadot #define UBI32_MEM_NOC_BFDCD_CLK_SRC		200
210*c66ec88fSEmmanuel Vadot #define WCSS_AHB_CLK_SRC			201
211*c66ec88fSEmmanuel Vadot #define Q6_AXI_CLK_SRC				202
212*c66ec88fSEmmanuel Vadot #define GCC_Q6SS_PCLKDBG_CLK			203
213*c66ec88fSEmmanuel Vadot #define GCC_Q6_TSCTR_1TO2_CLK			204
214*c66ec88fSEmmanuel Vadot #define GCC_WCSS_CORE_TBU_CLK			205
215*c66ec88fSEmmanuel Vadot #define GCC_WCSS_AXI_M_CLK			206
216*c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_WCSS_AHB_CLK		207
217*c66ec88fSEmmanuel Vadot #define GCC_Q6_AXIM_CLK				208
218*c66ec88fSEmmanuel Vadot #define GCC_Q6SS_ATBM_CLK			209
219*c66ec88fSEmmanuel Vadot #define GCC_WCSS_Q6_TBU_CLK			210
220*c66ec88fSEmmanuel Vadot #define GCC_Q6_AXIM2_CLK			211
221*c66ec88fSEmmanuel Vadot #define GCC_Q6_AHB_CLK				212
222*c66ec88fSEmmanuel Vadot #define GCC_Q6_AHB_S_CLK			213
223*c66ec88fSEmmanuel Vadot #define GCC_WCSS_DBG_IFC_APB_CLK		214
224*c66ec88fSEmmanuel Vadot #define GCC_WCSS_DBG_IFC_ATB_CLK		215
225*c66ec88fSEmmanuel Vadot #define GCC_WCSS_DBG_IFC_NTS_CLK		216
226*c66ec88fSEmmanuel Vadot #define GCC_WCSS_DBG_IFC_DAPBUS_CLK		217
227*c66ec88fSEmmanuel Vadot #define GCC_WCSS_DBG_IFC_APB_BDG_CLK		218
228*c66ec88fSEmmanuel Vadot #define GCC_WCSS_DBG_IFC_ATB_BDG_CLK		219
229*c66ec88fSEmmanuel Vadot #define GCC_WCSS_DBG_IFC_NTS_BDG_CLK		220
230*c66ec88fSEmmanuel Vadot #define GCC_WCSS_DBG_IFC_DAPBUS_BDG_CLK		221
231*c66ec88fSEmmanuel Vadot #define GCC_WCSS_ECAHB_CLK			222
232*c66ec88fSEmmanuel Vadot #define GCC_WCSS_ACMT_CLK			223
233*c66ec88fSEmmanuel Vadot #define GCC_WCSS_AHB_S_CLK			224
234*c66ec88fSEmmanuel Vadot #define GCC_RBCPR_WCSS_CLK			225
235*c66ec88fSEmmanuel Vadot #define RBCPR_WCSS_CLK_SRC			226
236*c66ec88fSEmmanuel Vadot #define GCC_RBCPR_WCSS_AHB_CLK			227
237*c66ec88fSEmmanuel Vadot #define GCC_LPASS_CORE_AXIM_CLK			228
238*c66ec88fSEmmanuel Vadot #define GCC_LPASS_SNOC_CFG_CLK			229
239*c66ec88fSEmmanuel Vadot #define GCC_LPASS_Q6_AXIM_CLK			230
240*c66ec88fSEmmanuel Vadot #define GCC_LPASS_Q6_ATBM_AT_CLK		231
241*c66ec88fSEmmanuel Vadot #define GCC_LPASS_Q6_PCLKDBG_CLK		232
242*c66ec88fSEmmanuel Vadot #define GCC_LPASS_Q6SS_TSCTR_1TO2_CLK		233
243*c66ec88fSEmmanuel Vadot #define GCC_LPASS_Q6SS_TRIG_CLK			234
244*c66ec88fSEmmanuel Vadot #define GCC_LPASS_TBU_CLK			235
245*c66ec88fSEmmanuel Vadot #define LPASS_CORE_AXIM_CLK_SRC			236
246*c66ec88fSEmmanuel Vadot #define LPASS_SNOC_CFG_CLK_SRC			237
247*c66ec88fSEmmanuel Vadot #define LPASS_Q6_AXIM_CLK_SRC			238
248*c66ec88fSEmmanuel Vadot #define GCC_PCNOC_LPASS_CLK			239
249*c66ec88fSEmmanuel Vadot #define GCC_UBI0_UTCM_CLK			240
250*c66ec88fSEmmanuel Vadot #define SNOC_NSSNOC_BFDCD_CLK_SRC		241
251*c66ec88fSEmmanuel Vadot #define GCC_SNOC_NSSNOC_CLK			242
252*c66ec88fSEmmanuel Vadot #define GCC_MEM_NOC_Q6_AXI_CLK			243
253*c66ec88fSEmmanuel Vadot #define GCC_MEM_NOC_UBI32_CLK			244
254*c66ec88fSEmmanuel Vadot #define GCC_MEM_NOC_LPASS_CLK			245
255*c66ec88fSEmmanuel Vadot #define GCC_SNOC_LPASS_CFG_CLK			246
256*c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_QDSS_STM_AXI_CLK		247
257*c66ec88fSEmmanuel Vadot #define GCC_QDSS_STM_CLK			248
258*c66ec88fSEmmanuel Vadot #define GCC_QDSS_TRACECLKIN_CLK			249
259*c66ec88fSEmmanuel Vadot #define QDSS_STM_CLK_SRC			250
260*c66ec88fSEmmanuel Vadot #define QDSS_TRACECLKIN_CLK_SRC			251
261*c66ec88fSEmmanuel Vadot #define GCC_NSSNOC_ATB_CLK			252
262*c66ec88fSEmmanuel Vadot #endif
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