1c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only */ 2c66ec88fSEmmanuel Vadot /* 3c66ec88fSEmmanuel Vadot * Copyright (c) 2014, The Linux Foundation. All rights reserved. 4c66ec88fSEmmanuel Vadot */ 5c66ec88fSEmmanuel Vadot 6c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_CLK_APQ_GCC_8084_H 7c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_CLK_APQ_GCC_8084_H 8c66ec88fSEmmanuel Vadot 9c66ec88fSEmmanuel Vadot #define GPLL0 0 10c66ec88fSEmmanuel Vadot #define GPLL0_VOTE 1 11c66ec88fSEmmanuel Vadot #define GPLL1 2 12c66ec88fSEmmanuel Vadot #define GPLL1_VOTE 3 13c66ec88fSEmmanuel Vadot #define GPLL2 4 14c66ec88fSEmmanuel Vadot #define GPLL2_VOTE 5 15c66ec88fSEmmanuel Vadot #define GPLL3 6 16c66ec88fSEmmanuel Vadot #define GPLL3_VOTE 7 17c66ec88fSEmmanuel Vadot #define GPLL4 8 18c66ec88fSEmmanuel Vadot #define GPLL4_VOTE 9 19c66ec88fSEmmanuel Vadot #define CONFIG_NOC_CLK_SRC 10 20c66ec88fSEmmanuel Vadot #define PERIPH_NOC_CLK_SRC 11 21c66ec88fSEmmanuel Vadot #define SYSTEM_NOC_CLK_SRC 12 22c66ec88fSEmmanuel Vadot #define BLSP_UART_SIM_CLK_SRC 13 23c66ec88fSEmmanuel Vadot #define QDSS_TSCTR_CLK_SRC 14 24c66ec88fSEmmanuel Vadot #define UFS_AXI_CLK_SRC 15 25c66ec88fSEmmanuel Vadot #define RPM_CLK_SRC 16 26c66ec88fSEmmanuel Vadot #define KPSS_AHB_CLK_SRC 17 27c66ec88fSEmmanuel Vadot #define QDSS_AT_CLK_SRC 18 28c66ec88fSEmmanuel Vadot #define BIMC_DDR_CLK_SRC 19 29c66ec88fSEmmanuel Vadot #define USB30_MASTER_CLK_SRC 20 30c66ec88fSEmmanuel Vadot #define USB30_SEC_MASTER_CLK_SRC 21 31c66ec88fSEmmanuel Vadot #define USB_HSIC_AHB_CLK_SRC 22 32c66ec88fSEmmanuel Vadot #define MMSS_BIMC_GFX_CLK_SRC 23 33c66ec88fSEmmanuel Vadot #define QDSS_STM_CLK_SRC 24 34c66ec88fSEmmanuel Vadot #define ACC_CLK_SRC 25 35c66ec88fSEmmanuel Vadot #define SEC_CTRL_CLK_SRC 26 36c66ec88fSEmmanuel Vadot #define BLSP1_QUP1_I2C_APPS_CLK_SRC 27 37c66ec88fSEmmanuel Vadot #define BLSP1_QUP1_SPI_APPS_CLK_SRC 28 38c66ec88fSEmmanuel Vadot #define BLSP1_QUP2_I2C_APPS_CLK_SRC 29 39c66ec88fSEmmanuel Vadot #define BLSP1_QUP2_SPI_APPS_CLK_SRC 30 40c66ec88fSEmmanuel Vadot #define BLSP1_QUP3_I2C_APPS_CLK_SRC 31 41c66ec88fSEmmanuel Vadot #define BLSP1_QUP3_SPI_APPS_CLK_SRC 32 42c66ec88fSEmmanuel Vadot #define BLSP1_QUP4_I2C_APPS_CLK_SRC 33 43c66ec88fSEmmanuel Vadot #define BLSP1_QUP4_SPI_APPS_CLK_SRC 34 44c66ec88fSEmmanuel Vadot #define BLSP1_QUP5_I2C_APPS_CLK_SRC 35 45c66ec88fSEmmanuel Vadot #define BLSP1_QUP5_SPI_APPS_CLK_SRC 36 46c66ec88fSEmmanuel Vadot #define BLSP1_QUP6_I2C_APPS_CLK_SRC 37 47c66ec88fSEmmanuel Vadot #define BLSP1_QUP6_SPI_APPS_CLK_SRC 38 48c66ec88fSEmmanuel Vadot #define BLSP1_UART1_APPS_CLK_SRC 39 49c66ec88fSEmmanuel Vadot #define BLSP1_UART2_APPS_CLK_SRC 40 50c66ec88fSEmmanuel Vadot #define BLSP1_UART3_APPS_CLK_SRC 41 51c66ec88fSEmmanuel Vadot #define BLSP1_UART4_APPS_CLK_SRC 42 52c66ec88fSEmmanuel Vadot #define BLSP1_UART5_APPS_CLK_SRC 43 53c66ec88fSEmmanuel Vadot #define BLSP1_UART6_APPS_CLK_SRC 44 54c66ec88fSEmmanuel Vadot #define BLSP2_QUP1_I2C_APPS_CLK_SRC 45 55c66ec88fSEmmanuel Vadot #define BLSP2_QUP1_SPI_APPS_CLK_SRC 46 56c66ec88fSEmmanuel Vadot #define BLSP2_QUP2_I2C_APPS_CLK_SRC 47 57c66ec88fSEmmanuel Vadot #define BLSP2_QUP2_SPI_APPS_CLK_SRC 48 58c66ec88fSEmmanuel Vadot #define BLSP2_QUP3_I2C_APPS_CLK_SRC 49 59c66ec88fSEmmanuel Vadot #define BLSP2_QUP3_SPI_APPS_CLK_SRC 50 60c66ec88fSEmmanuel Vadot #define BLSP2_QUP4_I2C_APPS_CLK_SRC 51 61c66ec88fSEmmanuel Vadot #define BLSP2_QUP4_SPI_APPS_CLK_SRC 52 62c66ec88fSEmmanuel Vadot #define BLSP2_QUP5_I2C_APPS_CLK_SRC 53 63c66ec88fSEmmanuel Vadot #define BLSP2_QUP5_SPI_APPS_CLK_SRC 54 64c66ec88fSEmmanuel Vadot #define BLSP2_QUP6_I2C_APPS_CLK_SRC 55 65c66ec88fSEmmanuel Vadot #define BLSP2_QUP6_SPI_APPS_CLK_SRC 56 66c66ec88fSEmmanuel Vadot #define BLSP2_UART1_APPS_CLK_SRC 57 67c66ec88fSEmmanuel Vadot #define BLSP2_UART2_APPS_CLK_SRC 58 68c66ec88fSEmmanuel Vadot #define BLSP2_UART3_APPS_CLK_SRC 59 69c66ec88fSEmmanuel Vadot #define BLSP2_UART4_APPS_CLK_SRC 60 70c66ec88fSEmmanuel Vadot #define BLSP2_UART5_APPS_CLK_SRC 61 71c66ec88fSEmmanuel Vadot #define BLSP2_UART6_APPS_CLK_SRC 62 72c66ec88fSEmmanuel Vadot #define CE1_CLK_SRC 63 73c66ec88fSEmmanuel Vadot #define CE2_CLK_SRC 64 74c66ec88fSEmmanuel Vadot #define CE3_CLK_SRC 65 75c66ec88fSEmmanuel Vadot #define GP1_CLK_SRC 66 76c66ec88fSEmmanuel Vadot #define GP2_CLK_SRC 67 77c66ec88fSEmmanuel Vadot #define GP3_CLK_SRC 68 78c66ec88fSEmmanuel Vadot #define PDM2_CLK_SRC 69 79c66ec88fSEmmanuel Vadot #define QDSS_TRACECLKIN_CLK_SRC 70 80c66ec88fSEmmanuel Vadot #define RBCPR_CLK_SRC 71 81c66ec88fSEmmanuel Vadot #define SATA_ASIC0_CLK_SRC 72 82c66ec88fSEmmanuel Vadot #define SATA_PMALIVE_CLK_SRC 73 83c66ec88fSEmmanuel Vadot #define SATA_RX_CLK_SRC 74 84c66ec88fSEmmanuel Vadot #define SATA_RX_OOB_CLK_SRC 75 85c66ec88fSEmmanuel Vadot #define SDCC1_APPS_CLK_SRC 76 86c66ec88fSEmmanuel Vadot #define SDCC2_APPS_CLK_SRC 77 87c66ec88fSEmmanuel Vadot #define SDCC3_APPS_CLK_SRC 78 88c66ec88fSEmmanuel Vadot #define SDCC4_APPS_CLK_SRC 79 89c66ec88fSEmmanuel Vadot #define GCC_SNOC_BUS_TIMEOUT0_AHB_CLK 80 90c66ec88fSEmmanuel Vadot #define SPMI_AHB_CLK_SRC 81 91c66ec88fSEmmanuel Vadot #define SPMI_SER_CLK_SRC 82 92c66ec88fSEmmanuel Vadot #define TSIF_REF_CLK_SRC 83 93c66ec88fSEmmanuel Vadot #define USB30_MOCK_UTMI_CLK_SRC 84 94c66ec88fSEmmanuel Vadot #define USB30_SEC_MOCK_UTMI_CLK_SRC 85 95c66ec88fSEmmanuel Vadot #define USB_HS_SYSTEM_CLK_SRC 86 96c66ec88fSEmmanuel Vadot #define USB_HSIC_CLK_SRC 87 97c66ec88fSEmmanuel Vadot #define USB_HSIC_IO_CAL_CLK_SRC 88 98c66ec88fSEmmanuel Vadot #define USB_HSIC_MOCK_UTMI_CLK_SRC 89 99c66ec88fSEmmanuel Vadot #define USB_HSIC_SYSTEM_CLK_SRC 90 100c66ec88fSEmmanuel Vadot #define GCC_BAM_DMA_AHB_CLK 91 101c66ec88fSEmmanuel Vadot #define GCC_BAM_DMA_INACTIVITY_TIMERS_CLK 92 102c66ec88fSEmmanuel Vadot #define DDR_CLK_SRC 93 103c66ec88fSEmmanuel Vadot #define GCC_BIMC_CFG_AHB_CLK 94 104c66ec88fSEmmanuel Vadot #define GCC_BIMC_CLK 95 105c66ec88fSEmmanuel Vadot #define GCC_BIMC_KPSS_AXI_CLK 96 106c66ec88fSEmmanuel Vadot #define GCC_BIMC_SLEEP_CLK 97 107c66ec88fSEmmanuel Vadot #define GCC_BIMC_SYSNOC_AXI_CLK 98 108c66ec88fSEmmanuel Vadot #define GCC_BIMC_XO_CLK 99 109c66ec88fSEmmanuel Vadot #define GCC_BLSP1_AHB_CLK 100 110c66ec88fSEmmanuel Vadot #define GCC_BLSP1_SLEEP_CLK 101 111c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP1_I2C_APPS_CLK 102 112c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP1_SPI_APPS_CLK 103 113c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP2_I2C_APPS_CLK 104 114c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP2_SPI_APPS_CLK 105 115c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP3_I2C_APPS_CLK 106 116c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP3_SPI_APPS_CLK 107 117c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP4_I2C_APPS_CLK 108 118c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP4_SPI_APPS_CLK 109 119c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP5_I2C_APPS_CLK 110 120c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP5_SPI_APPS_CLK 111 121c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP6_I2C_APPS_CLK 112 122c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP6_SPI_APPS_CLK 113 123c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART1_APPS_CLK 114 124c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART1_SIM_CLK 115 125c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART2_APPS_CLK 116 126c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART2_SIM_CLK 117 127c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART3_APPS_CLK 118 128c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART3_SIM_CLK 119 129c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART4_APPS_CLK 120 130c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART4_SIM_CLK 121 131c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART5_APPS_CLK 122 132c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART5_SIM_CLK 123 133c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART6_APPS_CLK 124 134c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART6_SIM_CLK 125 135c66ec88fSEmmanuel Vadot #define GCC_BLSP2_AHB_CLK 126 136c66ec88fSEmmanuel Vadot #define GCC_BLSP2_SLEEP_CLK 127 137c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP1_I2C_APPS_CLK 128 138c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP1_SPI_APPS_CLK 129 139c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP2_I2C_APPS_CLK 130 140c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP2_SPI_APPS_CLK 131 141c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP3_I2C_APPS_CLK 132 142c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP3_SPI_APPS_CLK 133 143c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP4_I2C_APPS_CLK 134 144c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP4_SPI_APPS_CLK 135 145c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP5_I2C_APPS_CLK 136 146c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP5_SPI_APPS_CLK 137 147c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP6_I2C_APPS_CLK 138 148c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP6_SPI_APPS_CLK 139 149c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART1_APPS_CLK 140 150c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART1_SIM_CLK 141 151c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART2_APPS_CLK 142 152c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART2_SIM_CLK 143 153c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART3_APPS_CLK 144 154c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART3_SIM_CLK 145 155c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART4_APPS_CLK 146 156c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART4_SIM_CLK 147 157c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART5_APPS_CLK 148 158c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART5_SIM_CLK 149 159c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART6_APPS_CLK 150 160c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART6_SIM_CLK 151 161c66ec88fSEmmanuel Vadot #define GCC_BOOT_ROM_AHB_CLK 152 162c66ec88fSEmmanuel Vadot #define GCC_CE1_AHB_CLK 153 163c66ec88fSEmmanuel Vadot #define GCC_CE1_AXI_CLK 154 164c66ec88fSEmmanuel Vadot #define GCC_CE1_CLK 155 165c66ec88fSEmmanuel Vadot #define GCC_CE2_AHB_CLK 156 166c66ec88fSEmmanuel Vadot #define GCC_CE2_AXI_CLK 157 167c66ec88fSEmmanuel Vadot #define GCC_CE2_CLK 158 168c66ec88fSEmmanuel Vadot #define GCC_CE3_AHB_CLK 159 169c66ec88fSEmmanuel Vadot #define GCC_CE3_AXI_CLK 160 170c66ec88fSEmmanuel Vadot #define GCC_CE3_CLK 161 171c66ec88fSEmmanuel Vadot #define GCC_CNOC_BUS_TIMEOUT0_AHB_CLK 162 172c66ec88fSEmmanuel Vadot #define GCC_CNOC_BUS_TIMEOUT1_AHB_CLK 163 173c66ec88fSEmmanuel Vadot #define GCC_CNOC_BUS_TIMEOUT2_AHB_CLK 164 174c66ec88fSEmmanuel Vadot #define GCC_CNOC_BUS_TIMEOUT3_AHB_CLK 165 175c66ec88fSEmmanuel Vadot #define GCC_CNOC_BUS_TIMEOUT4_AHB_CLK 166 176c66ec88fSEmmanuel Vadot #define GCC_CNOC_BUS_TIMEOUT5_AHB_CLK 167 177c66ec88fSEmmanuel Vadot #define GCC_CNOC_BUS_TIMEOUT6_AHB_CLK 168 178c66ec88fSEmmanuel Vadot #define GCC_CNOC_BUS_TIMEOUT7_AHB_CLK 169 179c66ec88fSEmmanuel Vadot #define GCC_CFG_NOC_AHB_CLK 170 180c66ec88fSEmmanuel Vadot #define GCC_CFG_NOC_DDR_CFG_CLK 171 181c66ec88fSEmmanuel Vadot #define GCC_CFG_NOC_RPM_AHB_CLK 172 182c66ec88fSEmmanuel Vadot #define GCC_COPSS_SMMU_AHB_CLK 173 183c66ec88fSEmmanuel Vadot #define GCC_COPSS_SMMU_AXI_CLK 174 184c66ec88fSEmmanuel Vadot #define GCC_DCD_XO_CLK 175 185c66ec88fSEmmanuel Vadot #define GCC_BIMC_DDR_CH0_CLK 176 186c66ec88fSEmmanuel Vadot #define GCC_BIMC_DDR_CH1_CLK 177 187c66ec88fSEmmanuel Vadot #define GCC_BIMC_DDR_CPLL0_CLK 178 188c66ec88fSEmmanuel Vadot #define GCC_BIMC_DDR_CPLL1_CLK 179 189c66ec88fSEmmanuel Vadot #define GCC_BIMC_GFX_CLK 180 190c66ec88fSEmmanuel Vadot #define GCC_DDR_DIM_CFG_CLK 181 191c66ec88fSEmmanuel Vadot #define GCC_DDR_DIM_SLEEP_CLK 182 192c66ec88fSEmmanuel Vadot #define GCC_DEHR_CLK 183 193c66ec88fSEmmanuel Vadot #define GCC_AHB_CLK 184 194c66ec88fSEmmanuel Vadot #define GCC_IM_SLEEP_CLK 185 195c66ec88fSEmmanuel Vadot #define GCC_XO_CLK 186 196c66ec88fSEmmanuel Vadot #define GCC_XO_DIV4_CLK 187 197c66ec88fSEmmanuel Vadot #define GCC_GP1_CLK 188 198c66ec88fSEmmanuel Vadot #define GCC_GP2_CLK 189 199c66ec88fSEmmanuel Vadot #define GCC_GP3_CLK 190 200c66ec88fSEmmanuel Vadot #define GCC_IMEM_AXI_CLK 191 201c66ec88fSEmmanuel Vadot #define GCC_IMEM_CFG_AHB_CLK 192 202c66ec88fSEmmanuel Vadot #define GCC_KPSS_AHB_CLK 193 203c66ec88fSEmmanuel Vadot #define GCC_KPSS_AXI_CLK 194 204c66ec88fSEmmanuel Vadot #define GCC_LPASS_MPORT_AXI_CLK 195 205c66ec88fSEmmanuel Vadot #define GCC_LPASS_Q6_AXI_CLK 196 206c66ec88fSEmmanuel Vadot #define GCC_LPASS_SWAY_CLK 197 207c66ec88fSEmmanuel Vadot #define GCC_MMSS_BIMC_GFX_CLK 198 208c66ec88fSEmmanuel Vadot #define GCC_MMSS_NOC_AT_CLK 199 209c66ec88fSEmmanuel Vadot #define GCC_MMSS_NOC_CFG_AHB_CLK 200 210c66ec88fSEmmanuel Vadot #define GCC_MMSS_VPU_MAPLE_SYS_NOC_AXI_CLK 201 211c66ec88fSEmmanuel Vadot #define GCC_OCMEM_NOC_CFG_AHB_CLK 202 212c66ec88fSEmmanuel Vadot #define GCC_OCMEM_SYS_NOC_AXI_CLK 203 213c66ec88fSEmmanuel Vadot #define GCC_MPM_AHB_CLK 204 214c66ec88fSEmmanuel Vadot #define GCC_MSG_RAM_AHB_CLK 205 215c66ec88fSEmmanuel Vadot #define GCC_NOC_CONF_XPU_AHB_CLK 206 216c66ec88fSEmmanuel Vadot #define GCC_PDM2_CLK 207 217c66ec88fSEmmanuel Vadot #define GCC_PDM_AHB_CLK 208 218c66ec88fSEmmanuel Vadot #define GCC_PDM_XO4_CLK 209 219c66ec88fSEmmanuel Vadot #define GCC_PERIPH_NOC_AHB_CLK 210 220c66ec88fSEmmanuel Vadot #define GCC_PERIPH_NOC_AT_CLK 211 221c66ec88fSEmmanuel Vadot #define GCC_PERIPH_NOC_CFG_AHB_CLK 212 222c66ec88fSEmmanuel Vadot #define GCC_PERIPH_NOC_USB_HSIC_AHB_CLK 213 223c66ec88fSEmmanuel Vadot #define GCC_PERIPH_NOC_MPU_CFG_AHB_CLK 214 224c66ec88fSEmmanuel Vadot #define GCC_PERIPH_XPU_AHB_CLK 215 225c66ec88fSEmmanuel Vadot #define GCC_PNOC_BUS_TIMEOUT0_AHB_CLK 216 226c66ec88fSEmmanuel Vadot #define GCC_PNOC_BUS_TIMEOUT1_AHB_CLK 217 227c66ec88fSEmmanuel Vadot #define GCC_PNOC_BUS_TIMEOUT2_AHB_CLK 218 228c66ec88fSEmmanuel Vadot #define GCC_PNOC_BUS_TIMEOUT3_AHB_CLK 219 229c66ec88fSEmmanuel Vadot #define GCC_PNOC_BUS_TIMEOUT4_AHB_CLK 220 230c66ec88fSEmmanuel Vadot #define GCC_PRNG_AHB_CLK 221 231c66ec88fSEmmanuel Vadot #define GCC_QDSS_AT_CLK 222 232c66ec88fSEmmanuel Vadot #define GCC_QDSS_CFG_AHB_CLK 223 233c66ec88fSEmmanuel Vadot #define GCC_QDSS_DAP_AHB_CLK 224 234c66ec88fSEmmanuel Vadot #define GCC_QDSS_DAP_CLK 225 235c66ec88fSEmmanuel Vadot #define GCC_QDSS_ETR_USB_CLK 226 236c66ec88fSEmmanuel Vadot #define GCC_QDSS_STM_CLK 227 237c66ec88fSEmmanuel Vadot #define GCC_QDSS_TRACECLKIN_CLK 228 238c66ec88fSEmmanuel Vadot #define GCC_QDSS_TSCTR_DIV16_CLK 229 239c66ec88fSEmmanuel Vadot #define GCC_QDSS_TSCTR_DIV2_CLK 230 240c66ec88fSEmmanuel Vadot #define GCC_QDSS_TSCTR_DIV3_CLK 231 241c66ec88fSEmmanuel Vadot #define GCC_QDSS_TSCTR_DIV4_CLK 232 242c66ec88fSEmmanuel Vadot #define GCC_QDSS_TSCTR_DIV8_CLK 233 243c66ec88fSEmmanuel Vadot #define GCC_QDSS_RBCPR_XPU_AHB_CLK 234 244c66ec88fSEmmanuel Vadot #define GCC_RBCPR_AHB_CLK 235 245c66ec88fSEmmanuel Vadot #define GCC_RBCPR_CLK 236 246c66ec88fSEmmanuel Vadot #define GCC_RPM_BUS_AHB_CLK 237 247c66ec88fSEmmanuel Vadot #define GCC_RPM_PROC_HCLK 238 248c66ec88fSEmmanuel Vadot #define GCC_RPM_SLEEP_CLK 239 249c66ec88fSEmmanuel Vadot #define GCC_RPM_TIMER_CLK 240 250c66ec88fSEmmanuel Vadot #define GCC_SATA_ASIC0_CLK 241 251c66ec88fSEmmanuel Vadot #define GCC_SATA_AXI_CLK 242 252c66ec88fSEmmanuel Vadot #define GCC_SATA_CFG_AHB_CLK 243 253c66ec88fSEmmanuel Vadot #define GCC_SATA_PMALIVE_CLK 244 254c66ec88fSEmmanuel Vadot #define GCC_SATA_RX_CLK 245 255c66ec88fSEmmanuel Vadot #define GCC_SATA_RX_OOB_CLK 246 256c66ec88fSEmmanuel Vadot #define GCC_SDCC1_AHB_CLK 247 257c66ec88fSEmmanuel Vadot #define GCC_SDCC1_APPS_CLK 248 258c66ec88fSEmmanuel Vadot #define GCC_SDCC1_CDCCAL_FF_CLK 249 259c66ec88fSEmmanuel Vadot #define GCC_SDCC1_CDCCAL_SLEEP_CLK 250 260c66ec88fSEmmanuel Vadot #define GCC_SDCC2_AHB_CLK 251 261c66ec88fSEmmanuel Vadot #define GCC_SDCC2_APPS_CLK 252 262c66ec88fSEmmanuel Vadot #define GCC_SDCC2_INACTIVITY_TIMERS_CLK 253 263c66ec88fSEmmanuel Vadot #define GCC_SDCC3_AHB_CLK 254 264c66ec88fSEmmanuel Vadot #define GCC_SDCC3_APPS_CLK 255 265c66ec88fSEmmanuel Vadot #define GCC_SDCC3_INACTIVITY_TIMERS_CLK 256 266c66ec88fSEmmanuel Vadot #define GCC_SDCC4_AHB_CLK 257 267c66ec88fSEmmanuel Vadot #define GCC_SDCC4_APPS_CLK 258 268c66ec88fSEmmanuel Vadot #define GCC_SDCC4_INACTIVITY_TIMERS_CLK 259 269c66ec88fSEmmanuel Vadot #define GCC_SEC_CTRL_ACC_CLK 260 270c66ec88fSEmmanuel Vadot #define GCC_SEC_CTRL_AHB_CLK 261 271c66ec88fSEmmanuel Vadot #define GCC_SEC_CTRL_BOOT_ROM_PATCH_CLK 262 272c66ec88fSEmmanuel Vadot #define GCC_SEC_CTRL_CLK 263 273c66ec88fSEmmanuel Vadot #define GCC_SEC_CTRL_SENSE_CLK 264 274c66ec88fSEmmanuel Vadot #define GCC_SNOC_BUS_TIMEOUT2_AHB_CLK 265 275c66ec88fSEmmanuel Vadot #define GCC_SNOC_BUS_TIMEOUT3_AHB_CLK 266 276c66ec88fSEmmanuel Vadot #define GCC_SPDM_BIMC_CY_CLK 267 277c66ec88fSEmmanuel Vadot #define GCC_SPDM_CFG_AHB_CLK 268 278c66ec88fSEmmanuel Vadot #define GCC_SPDM_DEBUG_CY_CLK 269 279c66ec88fSEmmanuel Vadot #define GCC_SPDM_FF_CLK 270 280c66ec88fSEmmanuel Vadot #define GCC_SPDM_MSTR_AHB_CLK 271 281c66ec88fSEmmanuel Vadot #define GCC_SPDM_PNOC_CY_CLK 272 282c66ec88fSEmmanuel Vadot #define GCC_SPDM_RPM_CY_CLK 273 283c66ec88fSEmmanuel Vadot #define GCC_SPDM_SNOC_CY_CLK 274 284c66ec88fSEmmanuel Vadot #define GCC_SPMI_AHB_CLK 275 285c66ec88fSEmmanuel Vadot #define GCC_SPMI_CNOC_AHB_CLK 276 286c66ec88fSEmmanuel Vadot #define GCC_SPMI_SER_CLK 277 287c66ec88fSEmmanuel Vadot #define GCC_SPSS_AHB_CLK 278 288c66ec88fSEmmanuel Vadot #define GCC_SNOC_CNOC_AHB_CLK 279 289c66ec88fSEmmanuel Vadot #define GCC_SNOC_PNOC_AHB_CLK 280 290c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_AT_CLK 281 291c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_AXI_CLK 282 292c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_KPSS_AHB_CLK 283 293c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_QDSS_STM_AXI_CLK 284 294c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_UFS_AXI_CLK 285 295c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_USB3_AXI_CLK 286 296c66ec88fSEmmanuel Vadot #define GCC_SYS_NOC_USB3_SEC_AXI_CLK 287 297c66ec88fSEmmanuel Vadot #define GCC_TCSR_AHB_CLK 288 298c66ec88fSEmmanuel Vadot #define GCC_TLMM_AHB_CLK 289 299c66ec88fSEmmanuel Vadot #define GCC_TLMM_CLK 290 300c66ec88fSEmmanuel Vadot #define GCC_TSIF_AHB_CLK 291 301c66ec88fSEmmanuel Vadot #define GCC_TSIF_INACTIVITY_TIMERS_CLK 292 302c66ec88fSEmmanuel Vadot #define GCC_TSIF_REF_CLK 293 303c66ec88fSEmmanuel Vadot #define GCC_UFS_AHB_CLK 294 304c66ec88fSEmmanuel Vadot #define GCC_UFS_AXI_CLK 295 305c66ec88fSEmmanuel Vadot #define GCC_UFS_RX_CFG_CLK 296 306c66ec88fSEmmanuel Vadot #define GCC_UFS_RX_SYMBOL_0_CLK 297 307c66ec88fSEmmanuel Vadot #define GCC_UFS_RX_SYMBOL_1_CLK 298 308c66ec88fSEmmanuel Vadot #define GCC_UFS_TX_CFG_CLK 299 309c66ec88fSEmmanuel Vadot #define GCC_UFS_TX_SYMBOL_0_CLK 300 310c66ec88fSEmmanuel Vadot #define GCC_UFS_TX_SYMBOL_1_CLK 301 311c66ec88fSEmmanuel Vadot #define GCC_USB2A_PHY_SLEEP_CLK 302 312c66ec88fSEmmanuel Vadot #define GCC_USB2B_PHY_SLEEP_CLK 303 313c66ec88fSEmmanuel Vadot #define GCC_USB30_MASTER_CLK 304 314c66ec88fSEmmanuel Vadot #define GCC_USB30_MOCK_UTMI_CLK 305 315c66ec88fSEmmanuel Vadot #define GCC_USB30_SLEEP_CLK 306 316c66ec88fSEmmanuel Vadot #define GCC_USB30_SEC_MASTER_CLK 307 317c66ec88fSEmmanuel Vadot #define GCC_USB30_SEC_MOCK_UTMI_CLK 308 318c66ec88fSEmmanuel Vadot #define GCC_USB30_SEC_SLEEP_CLK 309 319c66ec88fSEmmanuel Vadot #define GCC_USB_HS_AHB_CLK 310 320c66ec88fSEmmanuel Vadot #define GCC_USB_HS_INACTIVITY_TIMERS_CLK 311 321c66ec88fSEmmanuel Vadot #define GCC_USB_HS_SYSTEM_CLK 312 322c66ec88fSEmmanuel Vadot #define GCC_USB_HSIC_AHB_CLK 313 323c66ec88fSEmmanuel Vadot #define GCC_USB_HSIC_CLK 314 324c66ec88fSEmmanuel Vadot #define GCC_USB_HSIC_IO_CAL_CLK 315 325c66ec88fSEmmanuel Vadot #define GCC_USB_HSIC_IO_CAL_SLEEP_CLK 316 326c66ec88fSEmmanuel Vadot #define GCC_USB_HSIC_MOCK_UTMI_CLK 317 327c66ec88fSEmmanuel Vadot #define GCC_USB_HSIC_SYSTEM_CLK 318 328c66ec88fSEmmanuel Vadot #define PCIE_0_AUX_CLK_SRC 319 329c66ec88fSEmmanuel Vadot #define PCIE_0_PIPE_CLK_SRC 320 330c66ec88fSEmmanuel Vadot #define PCIE_1_AUX_CLK_SRC 321 331c66ec88fSEmmanuel Vadot #define PCIE_1_PIPE_CLK_SRC 322 332c66ec88fSEmmanuel Vadot #define GCC_PCIE_0_AUX_CLK 323 333c66ec88fSEmmanuel Vadot #define GCC_PCIE_0_CFG_AHB_CLK 324 334c66ec88fSEmmanuel Vadot #define GCC_PCIE_0_MSTR_AXI_CLK 325 335c66ec88fSEmmanuel Vadot #define GCC_PCIE_0_PIPE_CLK 326 336c66ec88fSEmmanuel Vadot #define GCC_PCIE_0_SLV_AXI_CLK 327 337c66ec88fSEmmanuel Vadot #define GCC_PCIE_1_AUX_CLK 328 338c66ec88fSEmmanuel Vadot #define GCC_PCIE_1_CFG_AHB_CLK 329 339c66ec88fSEmmanuel Vadot #define GCC_PCIE_1_MSTR_AXI_CLK 330 340c66ec88fSEmmanuel Vadot #define GCC_PCIE_1_PIPE_CLK 331 341c66ec88fSEmmanuel Vadot #define GCC_PCIE_1_SLV_AXI_CLK 332 342*cb7aa33aSEmmanuel Vadot #define GCC_MMSS_GPLL0_CLK_SRC 333 343c66ec88fSEmmanuel Vadot 344c66ec88fSEmmanuel Vadot /* gdscs */ 345c66ec88fSEmmanuel Vadot #define USB_HS_HSIC_GDSC 0 346c66ec88fSEmmanuel Vadot #define PCIE0_GDSC 1 347c66ec88fSEmmanuel Vadot #define PCIE1_GDSC 2 348c66ec88fSEmmanuel Vadot #define USB30_GDSC 3 349c66ec88fSEmmanuel Vadot 350c66ec88fSEmmanuel Vadot #endif 351