xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/qcom,dispcc-qcm2290.h (revision fac71e4e09885bb2afa3d984a0c239a52e1a7418)
1c9ccf3a3SEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2c9ccf3a3SEmmanuel Vadot /*
3c9ccf3a3SEmmanuel Vadot  * Copyright (c) 2019, The Linux Foundation. All rights reserved.
4c9ccf3a3SEmmanuel Vadot  */
5c9ccf3a3SEmmanuel Vadot 
6c9ccf3a3SEmmanuel Vadot #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_QCM2290_H
7c9ccf3a3SEmmanuel Vadot #define _DT_BINDINGS_CLK_QCOM_DISP_CC_QCM2290_H
8c9ccf3a3SEmmanuel Vadot 
9c9ccf3a3SEmmanuel Vadot /* DISP_CC clocks */
10c9ccf3a3SEmmanuel Vadot #define DISP_CC_PLL0				0
11c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_AHB_CLK			1
12c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_AHB_CLK_SRC		2
13c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_BYTE0_CLK			3
14c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_BYTE0_CLK_SRC		4
15c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC		5
16c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_BYTE0_INTF_CLK		6
17c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_ESC0_CLK			7
18c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_ESC0_CLK_SRC		8
19c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_MDP_CLK			9
20c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_MDP_CLK_SRC		10
21c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_MDP_LUT_CLK		11
22c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_NON_GDSC_AHB_CLK		12
23c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_PCLK0_CLK			13
24c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_PCLK0_CLK_SRC		14
25c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_VSYNC_CLK			15
26c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_VSYNC_CLK_SRC		16
27c9ccf3a3SEmmanuel Vadot #define DISP_CC_SLEEP_CLK			17
28c9ccf3a3SEmmanuel Vadot #define DISP_CC_SLEEP_CLK_SRC			18
29c9ccf3a3SEmmanuel Vadot #define DISP_CC_XO_CLK				19
30c9ccf3a3SEmmanuel Vadot #define DISP_CC_XO_CLK_SRC			20
31c9ccf3a3SEmmanuel Vadot 
32*fac71e4eSEmmanuel Vadot /* GDSCs */
33c9ccf3a3SEmmanuel Vadot #define MDSS_GDSC				0
34c9ccf3a3SEmmanuel Vadot 
35*fac71e4eSEmmanuel Vadot /* Resets */
36*fac71e4eSEmmanuel Vadot #define DISP_CC_MDSS_CORE_BCR			0
37*fac71e4eSEmmanuel Vadot 
38c9ccf3a3SEmmanuel Vadot #endif
39