xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/qcom,gcc-sdm660.h (revision 8ccc0d235c226d84112561d453c49904398d085c)
1c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */
2c66ec88fSEmmanuel Vadot /*
3c66ec88fSEmmanuel Vadot  * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
4c66ec88fSEmmanuel Vadot  * Copyright (c) 2018, Craig Tatlor.
5c66ec88fSEmmanuel Vadot  */
6c66ec88fSEmmanuel Vadot 
7c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_CLK_MSM_GCC_660_H
8c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_CLK_MSM_GCC_660_H
9c66ec88fSEmmanuel Vadot 
10c66ec88fSEmmanuel Vadot #define BLSP1_QUP1_I2C_APPS_CLK_SRC		0
11c66ec88fSEmmanuel Vadot #define BLSP1_QUP1_SPI_APPS_CLK_SRC		1
12c66ec88fSEmmanuel Vadot #define BLSP1_QUP2_I2C_APPS_CLK_SRC		2
13c66ec88fSEmmanuel Vadot #define BLSP1_QUP2_SPI_APPS_CLK_SRC		3
14c66ec88fSEmmanuel Vadot #define BLSP1_QUP3_I2C_APPS_CLK_SRC		4
15c66ec88fSEmmanuel Vadot #define BLSP1_QUP3_SPI_APPS_CLK_SRC		5
16c66ec88fSEmmanuel Vadot #define BLSP1_QUP4_I2C_APPS_CLK_SRC		6
17c66ec88fSEmmanuel Vadot #define BLSP1_QUP4_SPI_APPS_CLK_SRC		7
18c66ec88fSEmmanuel Vadot #define BLSP1_UART1_APPS_CLK_SRC		8
19c66ec88fSEmmanuel Vadot #define BLSP1_UART2_APPS_CLK_SRC		9
20c66ec88fSEmmanuel Vadot #define BLSP2_QUP1_I2C_APPS_CLK_SRC		10
21c66ec88fSEmmanuel Vadot #define BLSP2_QUP1_SPI_APPS_CLK_SRC		11
22c66ec88fSEmmanuel Vadot #define BLSP2_QUP2_I2C_APPS_CLK_SRC		12
23c66ec88fSEmmanuel Vadot #define BLSP2_QUP2_SPI_APPS_CLK_SRC		13
24c66ec88fSEmmanuel Vadot #define BLSP2_QUP3_I2C_APPS_CLK_SRC		14
25c66ec88fSEmmanuel Vadot #define BLSP2_QUP3_SPI_APPS_CLK_SRC		15
26c66ec88fSEmmanuel Vadot #define BLSP2_QUP4_I2C_APPS_CLK_SRC		16
27c66ec88fSEmmanuel Vadot #define BLSP2_QUP4_SPI_APPS_CLK_SRC		17
28c66ec88fSEmmanuel Vadot #define BLSP2_UART1_APPS_CLK_SRC		18
29c66ec88fSEmmanuel Vadot #define BLSP2_UART2_APPS_CLK_SRC		19
30c66ec88fSEmmanuel Vadot #define GCC_AGGRE2_UFS_AXI_CLK			20
31c66ec88fSEmmanuel Vadot #define GCC_AGGRE2_USB3_AXI_CLK			21
32c66ec88fSEmmanuel Vadot #define GCC_BIMC_GFX_CLK			22
33c66ec88fSEmmanuel Vadot #define GCC_BIMC_HMSS_AXI_CLK			23
34c66ec88fSEmmanuel Vadot #define GCC_BIMC_MSS_Q6_AXI_CLK			24
35c66ec88fSEmmanuel Vadot #define GCC_BLSP1_AHB_CLK			25
36c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP1_I2C_APPS_CLK		26
37c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP1_SPI_APPS_CLK		27
38c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP2_I2C_APPS_CLK		28
39c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP2_SPI_APPS_CLK		29
40c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP3_I2C_APPS_CLK		30
41c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP3_SPI_APPS_CLK		31
42c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP4_I2C_APPS_CLK		32
43c66ec88fSEmmanuel Vadot #define GCC_BLSP1_QUP4_SPI_APPS_CLK		33
44c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART1_APPS_CLK		34
45c66ec88fSEmmanuel Vadot #define GCC_BLSP1_UART2_APPS_CLK		35
46c66ec88fSEmmanuel Vadot #define GCC_BLSP2_AHB_CLK			36
47c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP1_I2C_APPS_CLK		37
48c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP1_SPI_APPS_CLK		38
49c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP2_I2C_APPS_CLK		39
50c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP2_SPI_APPS_CLK		40
51c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP3_I2C_APPS_CLK		41
52c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP3_SPI_APPS_CLK		42
53c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP4_I2C_APPS_CLK		43
54c66ec88fSEmmanuel Vadot #define GCC_BLSP2_QUP4_SPI_APPS_CLK		44
55c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART1_APPS_CLK		45
56c66ec88fSEmmanuel Vadot #define GCC_BLSP2_UART2_APPS_CLK		46
57c66ec88fSEmmanuel Vadot #define GCC_BOOT_ROM_AHB_CLK			47
58c66ec88fSEmmanuel Vadot #define GCC_CFG_NOC_USB2_AXI_CLK		48
59c66ec88fSEmmanuel Vadot #define GCC_CFG_NOC_USB3_AXI_CLK		49
60c66ec88fSEmmanuel Vadot #define GCC_DCC_AHB_CLK				50
61c66ec88fSEmmanuel Vadot #define GCC_GP1_CLK				51
62c66ec88fSEmmanuel Vadot #define GCC_GP2_CLK				52
63c66ec88fSEmmanuel Vadot #define GCC_GP3_CLK				53
64c66ec88fSEmmanuel Vadot #define GCC_GPU_BIMC_GFX_CLK			54
65c66ec88fSEmmanuel Vadot #define GCC_GPU_CFG_AHB_CLK			55
66c66ec88fSEmmanuel Vadot #define GCC_GPU_GPLL0_CLK			56
67c66ec88fSEmmanuel Vadot #define GCC_GPU_GPLL0_DIV_CLK			57
68c66ec88fSEmmanuel Vadot #define GCC_HMSS_DVM_BUS_CLK			58
69c66ec88fSEmmanuel Vadot #define GCC_HMSS_RBCPR_CLK			59
70c66ec88fSEmmanuel Vadot #define GCC_MMSS_GPLL0_CLK			60
71c66ec88fSEmmanuel Vadot #define GCC_MMSS_GPLL0_DIV_CLK			61
72c66ec88fSEmmanuel Vadot #define GCC_MMSS_NOC_CFG_AHB_CLK		62
73c66ec88fSEmmanuel Vadot #define GCC_MMSS_SYS_NOC_AXI_CLK		63
74c66ec88fSEmmanuel Vadot #define GCC_MSS_CFG_AHB_CLK			64
75c66ec88fSEmmanuel Vadot #define GCC_MSS_GPLL0_DIV_CLK			65
76c66ec88fSEmmanuel Vadot #define GCC_MSS_MNOC_BIMC_AXI_CLK		66
77c66ec88fSEmmanuel Vadot #define GCC_MSS_Q6_BIMC_AXI_CLK			67
78c66ec88fSEmmanuel Vadot #define GCC_MSS_SNOC_AXI_CLK			68
79c66ec88fSEmmanuel Vadot #define GCC_PDM2_CLK				69
80c66ec88fSEmmanuel Vadot #define GCC_PDM_AHB_CLK				70
81c66ec88fSEmmanuel Vadot #define GCC_PRNG_AHB_CLK			71
82c66ec88fSEmmanuel Vadot #define GCC_QSPI_AHB_CLK			72
83c66ec88fSEmmanuel Vadot #define GCC_QSPI_SER_CLK			73
84c66ec88fSEmmanuel Vadot #define GCC_SDCC1_AHB_CLK			74
85c66ec88fSEmmanuel Vadot #define GCC_SDCC1_APPS_CLK			75
86c66ec88fSEmmanuel Vadot #define GCC_SDCC1_ICE_CORE_CLK			76
87c66ec88fSEmmanuel Vadot #define GCC_SDCC2_AHB_CLK			77
88c66ec88fSEmmanuel Vadot #define GCC_SDCC2_APPS_CLK			78
89c66ec88fSEmmanuel Vadot #define GCC_UFS_AHB_CLK				79
90c66ec88fSEmmanuel Vadot #define GCC_UFS_AXI_CLK				80
91c66ec88fSEmmanuel Vadot #define GCC_UFS_CLKREF_CLK			81
92c66ec88fSEmmanuel Vadot #define GCC_UFS_ICE_CORE_CLK			82
93c66ec88fSEmmanuel Vadot #define GCC_UFS_PHY_AUX_CLK			83
94c66ec88fSEmmanuel Vadot #define GCC_UFS_RX_SYMBOL_0_CLK			84
95c66ec88fSEmmanuel Vadot #define GCC_UFS_RX_SYMBOL_1_CLK			85
96c66ec88fSEmmanuel Vadot #define GCC_UFS_TX_SYMBOL_0_CLK			86
97c66ec88fSEmmanuel Vadot #define GCC_UFS_UNIPRO_CORE_CLK			87
98c66ec88fSEmmanuel Vadot #define GCC_USB20_MASTER_CLK			88
99c66ec88fSEmmanuel Vadot #define GCC_USB20_MOCK_UTMI_CLK			89
100c66ec88fSEmmanuel Vadot #define GCC_USB20_SLEEP_CLK			90
101c66ec88fSEmmanuel Vadot #define GCC_USB30_MASTER_CLK			91
102c66ec88fSEmmanuel Vadot #define GCC_USB30_MOCK_UTMI_CLK			92
103c66ec88fSEmmanuel Vadot #define GCC_USB30_SLEEP_CLK			93
104c66ec88fSEmmanuel Vadot #define GCC_USB3_CLKREF_CLK			94
105c66ec88fSEmmanuel Vadot #define GCC_USB3_PHY_AUX_CLK			95
106c66ec88fSEmmanuel Vadot #define GCC_USB3_PHY_PIPE_CLK			96
107c66ec88fSEmmanuel Vadot #define GCC_USB_PHY_CFG_AHB2PHY_CLK		97
108c66ec88fSEmmanuel Vadot #define GP1_CLK_SRC				98
109c66ec88fSEmmanuel Vadot #define GP2_CLK_SRC				99
110c66ec88fSEmmanuel Vadot #define GP3_CLK_SRC				100
111c66ec88fSEmmanuel Vadot #define GPLL0					101
112c66ec88fSEmmanuel Vadot #define GPLL0_EARLY				102
113c66ec88fSEmmanuel Vadot #define GPLL1					103
114c66ec88fSEmmanuel Vadot #define GPLL1_EARLY				104
115c66ec88fSEmmanuel Vadot #define GPLL4					105
116c66ec88fSEmmanuel Vadot #define GPLL4_EARLY				106
117c66ec88fSEmmanuel Vadot #define HMSS_GPLL0_CLK_SRC			107
118c66ec88fSEmmanuel Vadot #define HMSS_GPLL4_CLK_SRC			108
119c66ec88fSEmmanuel Vadot #define HMSS_RBCPR_CLK_SRC			109
120c66ec88fSEmmanuel Vadot #define PDM2_CLK_SRC				110
121c66ec88fSEmmanuel Vadot #define QSPI_SER_CLK_SRC			111
122c66ec88fSEmmanuel Vadot #define SDCC1_APPS_CLK_SRC			112
123c66ec88fSEmmanuel Vadot #define SDCC1_ICE_CORE_CLK_SRC			113
124c66ec88fSEmmanuel Vadot #define SDCC2_APPS_CLK_SRC			114
125c66ec88fSEmmanuel Vadot #define UFS_AXI_CLK_SRC				115
126c66ec88fSEmmanuel Vadot #define UFS_ICE_CORE_CLK_SRC			116
127c66ec88fSEmmanuel Vadot #define UFS_PHY_AUX_CLK_SRC			117
128c66ec88fSEmmanuel Vadot #define UFS_UNIPRO_CORE_CLK_SRC			118
129c66ec88fSEmmanuel Vadot #define USB20_MASTER_CLK_SRC			119
130c66ec88fSEmmanuel Vadot #define USB20_MOCK_UTMI_CLK_SRC			120
131c66ec88fSEmmanuel Vadot #define USB30_MASTER_CLK_SRC			121
132c66ec88fSEmmanuel Vadot #define USB30_MOCK_UTMI_CLK_SRC			122
133c66ec88fSEmmanuel Vadot #define USB3_PHY_AUX_CLK_SRC			123
134c66ec88fSEmmanuel Vadot #define GPLL0_OUT_MSSCC				124
135c66ec88fSEmmanuel Vadot #define GCC_UFS_AXI_HW_CTL_CLK			125
136c66ec88fSEmmanuel Vadot #define GCC_UFS_ICE_CORE_HW_CTL_CLK		126
137c66ec88fSEmmanuel Vadot #define GCC_UFS_PHY_AUX_HW_CTL_CLK		127
138c66ec88fSEmmanuel Vadot #define GCC_UFS_UNIPRO_CORE_HW_CTL_CLK		128
139c66ec88fSEmmanuel Vadot #define GCC_RX0_USB2_CLKREF_CLK			129
140c66ec88fSEmmanuel Vadot #define GCC_RX1_USB2_CLKREF_CLK			130
141c66ec88fSEmmanuel Vadot 
142c66ec88fSEmmanuel Vadot #define PCIE_0_GDSC	0
143c66ec88fSEmmanuel Vadot #define UFS_GDSC	1
144c66ec88fSEmmanuel Vadot #define USB_30_GDSC	2
145c66ec88fSEmmanuel Vadot 
146c66ec88fSEmmanuel Vadot #define GCC_QUSB2PHY_PRIM_BCR		0
147c66ec88fSEmmanuel Vadot #define GCC_QUSB2PHY_SEC_BCR		1
148c66ec88fSEmmanuel Vadot #define GCC_UFS_BCR			2
149c66ec88fSEmmanuel Vadot #define GCC_USB3_DP_PHY_BCR		3
150c66ec88fSEmmanuel Vadot #define GCC_USB3_PHY_BCR		4
151c66ec88fSEmmanuel Vadot #define GCC_USB3PHY_PHY_BCR		5
152c66ec88fSEmmanuel Vadot #define GCC_USB_20_BCR                  6
153c66ec88fSEmmanuel Vadot #define GCC_USB_30_BCR			7
154c66ec88fSEmmanuel Vadot #define GCC_USB_PHY_CFG_AHB2PHY_BCR	8
155c66ec88fSEmmanuel Vadot #define GCC_MSS_RESTART			9
156*8ccc0d23SEmmanuel Vadot #define GCC_SDCC1_BCR			10
157*8ccc0d23SEmmanuel Vadot #define GCC_SDCC2_BCR			11
158c66ec88fSEmmanuel Vadot 
159c66ec88fSEmmanuel Vadot #endif
160