1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved. 4*c66ec88fSEmmanuel Vadot * 5*c66ec88fSEmmanuel Vadot * Device Tree binding constants clocks for the Maxim 77620 PMIC. 6*c66ec88fSEmmanuel Vadot */ 7*c66ec88fSEmmanuel Vadot 8*c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_CLOCK_MAXIM_MAX77620_CLOCK_H 9*c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_CLOCK_MAXIM_MAX77620_CLOCK_H 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel Vadot /* Fixed rate clocks. */ 12*c66ec88fSEmmanuel Vadot 13*c66ec88fSEmmanuel Vadot #define MAX77620_CLK_32K_OUT0 0 14*c66ec88fSEmmanuel Vadot 15*c66ec88fSEmmanuel Vadot /* Total number of clocks. */ 16*c66ec88fSEmmanuel Vadot #define MAX77620_CLKS_NUM (MAX77620_CLK_32K_OUT0 + 1) 17*c66ec88fSEmmanuel Vadot 18*c66ec88fSEmmanuel Vadot #endif /* _DT_BINDINGS_CLOCK_MAXIM_MAX77620_CLOCK_H */ 19