1*c66ec88fSEmmanuel Vadot /* 2*c66ec88fSEmmanuel Vadot * Copyright (c) 2015 Joachim Eastwood <manabian@gmail.com> 3*c66ec88fSEmmanuel Vadot * 4*c66ec88fSEmmanuel Vadot * This code is released using a dual license strategy: BSD/GPL 5*c66ec88fSEmmanuel Vadot * You can choose the licence that better fits your requirements. 6*c66ec88fSEmmanuel Vadot * 7*c66ec88fSEmmanuel Vadot * Released under the terms of 3-clause BSD License 8*c66ec88fSEmmanuel Vadot * Released under the terms of GNU General Public License Version 2.0 9*c66ec88fSEmmanuel Vadot * 10*c66ec88fSEmmanuel Vadot */ 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel Vadot /* LPC18xx/43xx base clock ids */ 13*c66ec88fSEmmanuel Vadot #define BASE_SAFE_CLK 0 14*c66ec88fSEmmanuel Vadot #define BASE_USB0_CLK 1 15*c66ec88fSEmmanuel Vadot #define BASE_PERIPH_CLK 2 16*c66ec88fSEmmanuel Vadot #define BASE_USB1_CLK 3 17*c66ec88fSEmmanuel Vadot #define BASE_CPU_CLK 4 18*c66ec88fSEmmanuel Vadot #define BASE_SPIFI_CLK 5 19*c66ec88fSEmmanuel Vadot #define BASE_SPI_CLK 6 20*c66ec88fSEmmanuel Vadot #define BASE_PHY_RX_CLK 7 21*c66ec88fSEmmanuel Vadot #define BASE_PHY_TX_CLK 8 22*c66ec88fSEmmanuel Vadot #define BASE_APB1_CLK 9 23*c66ec88fSEmmanuel Vadot #define BASE_APB3_CLK 10 24*c66ec88fSEmmanuel Vadot #define BASE_LCD_CLK 11 25*c66ec88fSEmmanuel Vadot #define BASE_ADCHS_CLK 12 26*c66ec88fSEmmanuel Vadot #define BASE_SDIO_CLK 13 27*c66ec88fSEmmanuel Vadot #define BASE_SSP0_CLK 14 28*c66ec88fSEmmanuel Vadot #define BASE_SSP1_CLK 15 29*c66ec88fSEmmanuel Vadot #define BASE_UART0_CLK 16 30*c66ec88fSEmmanuel Vadot #define BASE_UART1_CLK 17 31*c66ec88fSEmmanuel Vadot #define BASE_UART2_CLK 18 32*c66ec88fSEmmanuel Vadot #define BASE_UART3_CLK 19 33*c66ec88fSEmmanuel Vadot #define BASE_OUT_CLK 20 34*c66ec88fSEmmanuel Vadot #define BASE_RES1_CLK 21 35*c66ec88fSEmmanuel Vadot #define BASE_RES2_CLK 22 36*c66ec88fSEmmanuel Vadot #define BASE_RES3_CLK 23 37*c66ec88fSEmmanuel Vadot #define BASE_RES4_CLK 24 38*c66ec88fSEmmanuel Vadot #define BASE_AUDIO_CLK 25 39*c66ec88fSEmmanuel Vadot #define BASE_CGU_OUT0_CLK 26 40*c66ec88fSEmmanuel Vadot #define BASE_CGU_OUT1_CLK 27 41*c66ec88fSEmmanuel Vadot #define BASE_CLK_MAX (BASE_CGU_OUT1_CLK + 1) 42