1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * This header provides clock numbers for the ingenic,jz4725b-cgu DT binding. 4*c66ec88fSEmmanuel Vadot */ 5*c66ec88fSEmmanuel Vadot 6*c66ec88fSEmmanuel Vadot #ifndef __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ 7*c66ec88fSEmmanuel Vadot #define __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_EXT 0 10*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_OSC32K 1 11*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_PLL 2 12*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_PLL_HALF 3 13*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_CCLK 4 14*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_HCLK 5 15*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_PCLK 6 16*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_MCLK 7 17*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_IPU 8 18*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_LCD 9 19*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_I2S 10 20*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_SPI 11 21*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_MMC_MUX 12 22*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_UDC 13 23*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_UART 14 24*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_DMA 15 25*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_ADC 16 26*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_I2C 17 27*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_AIC 18 28*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_MMC0 19 29*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_MMC1 20 30*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_BCH 21 31*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_TCU 22 32*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_EXT512 23 33*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_RTC 24 34*c66ec88fSEmmanuel Vadot #define JZ4725B_CLK_UDC_PHY 25 35*c66ec88fSEmmanuel Vadot 36*c66ec88fSEmmanuel Vadot #endif /* __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ */ 37