xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/ingenic,x1000-cgu.h (revision 8bab661a3316d8bd9b9fbd11a3b4371b91507bd2)
18cc087a1SEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */
28cc087a1SEmmanuel Vadot /*
38cc087a1SEmmanuel Vadot  * This header provides clock numbers for the ingenic,x1000-cgu DT binding.
48cc087a1SEmmanuel Vadot  *
58cc087a1SEmmanuel Vadot  * They are roughly ordered as:
68cc087a1SEmmanuel Vadot  *   - external clocks
78cc087a1SEmmanuel Vadot  *   - PLLs
88cc087a1SEmmanuel Vadot  *   - muxes/dividers in the order they appear in the x1000 programmers manual
98cc087a1SEmmanuel Vadot  *   - gates in order of their bit in the CLKGR* registers
108cc087a1SEmmanuel Vadot  */
118cc087a1SEmmanuel Vadot 
128cc087a1SEmmanuel Vadot #ifndef __DT_BINDINGS_CLOCK_X1000_CGU_H__
138cc087a1SEmmanuel Vadot #define __DT_BINDINGS_CLOCK_X1000_CGU_H__
148cc087a1SEmmanuel Vadot 
158cc087a1SEmmanuel Vadot #define X1000_CLK_EXCLK			0
168cc087a1SEmmanuel Vadot #define X1000_CLK_RTCLK			1
178cc087a1SEmmanuel Vadot #define X1000_CLK_APLL			2
188cc087a1SEmmanuel Vadot #define X1000_CLK_MPLL			3
198cc087a1SEmmanuel Vadot #define X1000_CLK_OTGPHY		4
208cc087a1SEmmanuel Vadot #define X1000_CLK_SCLKA			5
218cc087a1SEmmanuel Vadot #define X1000_CLK_CPUMUX		6
228cc087a1SEmmanuel Vadot #define X1000_CLK_CPU			7
238cc087a1SEmmanuel Vadot #define X1000_CLK_L2CACHE		8
248cc087a1SEmmanuel Vadot #define X1000_CLK_AHB0			9
258cc087a1SEmmanuel Vadot #define X1000_CLK_AHB2PMUX		10
268cc087a1SEmmanuel Vadot #define X1000_CLK_AHB2			11
278cc087a1SEmmanuel Vadot #define X1000_CLK_PCLK			12
288cc087a1SEmmanuel Vadot #define X1000_CLK_DDR			13
298cc087a1SEmmanuel Vadot #define X1000_CLK_MAC			14
308cc087a1SEmmanuel Vadot #define X1000_CLK_LCD			15
318cc087a1SEmmanuel Vadot #define X1000_CLK_MSCMUX		16
328cc087a1SEmmanuel Vadot #define X1000_CLK_MSC0			17
338cc087a1SEmmanuel Vadot #define X1000_CLK_MSC1			18
348cc087a1SEmmanuel Vadot #define X1000_CLK_OTG			19
358cc087a1SEmmanuel Vadot #define X1000_CLK_SSIPLL		20
368cc087a1SEmmanuel Vadot #define X1000_CLK_SSIPLL_DIV2	21
378cc087a1SEmmanuel Vadot #define X1000_CLK_SSIMUX		22
388cc087a1SEmmanuel Vadot #define X1000_CLK_EMC			23
398cc087a1SEmmanuel Vadot #define X1000_CLK_EFUSE			24
408cc087a1SEmmanuel Vadot #define X1000_CLK_SFC			25
418cc087a1SEmmanuel Vadot #define X1000_CLK_I2C0			26
428cc087a1SEmmanuel Vadot #define X1000_CLK_I2C1			27
438cc087a1SEmmanuel Vadot #define X1000_CLK_I2C2			28
448cc087a1SEmmanuel Vadot #define X1000_CLK_UART0			29
458cc087a1SEmmanuel Vadot #define X1000_CLK_UART1			30
468cc087a1SEmmanuel Vadot #define X1000_CLK_UART2			31
478cc087a1SEmmanuel Vadot #define X1000_CLK_TCU			32
488cc087a1SEmmanuel Vadot #define X1000_CLK_SSI			33
498cc087a1SEmmanuel Vadot #define X1000_CLK_OST			34
508cc087a1SEmmanuel Vadot #define X1000_CLK_PDMA			35
518cc087a1SEmmanuel Vadot #define X1000_CLK_EXCLK_DIV512	36
528cc087a1SEmmanuel Vadot #define X1000_CLK_RTC			37
53*8bab661aSEmmanuel Vadot #define X1000_CLK_AIC			38
54*8bab661aSEmmanuel Vadot #define X1000_CLK_I2SPLLMUX		39
55*8bab661aSEmmanuel Vadot #define X1000_CLK_I2SPLL		40
56*8bab661aSEmmanuel Vadot #define X1000_CLK_I2S			41
578cc087a1SEmmanuel Vadot 
588cc087a1SEmmanuel Vadot #endif /* __DT_BINDINGS_CLOCK_X1000_CGU_H__ */
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