1*8bab661aSEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*8bab661aSEmmanuel Vadot /* 3*8bab661aSEmmanuel Vadot * This header provides clock numbers for the ingenic,jz4755-cgu DT binding. 4*8bab661aSEmmanuel Vadot */ 5*8bab661aSEmmanuel Vadot 6*8bab661aSEmmanuel Vadot #ifndef __DT_BINDINGS_CLOCK_JZ4755_CGU_H__ 7*8bab661aSEmmanuel Vadot #define __DT_BINDINGS_CLOCK_JZ4755_CGU_H__ 8*8bab661aSEmmanuel Vadot 9*8bab661aSEmmanuel Vadot #define JZ4755_CLK_EXT 0 10*8bab661aSEmmanuel Vadot #define JZ4755_CLK_OSC32K 1 11*8bab661aSEmmanuel Vadot #define JZ4755_CLK_PLL 2 12*8bab661aSEmmanuel Vadot #define JZ4755_CLK_PLL_HALF 3 13*8bab661aSEmmanuel Vadot #define JZ4755_CLK_EXT_HALF 4 14*8bab661aSEmmanuel Vadot #define JZ4755_CLK_CCLK 5 15*8bab661aSEmmanuel Vadot #define JZ4755_CLK_H0CLK 6 16*8bab661aSEmmanuel Vadot #define JZ4755_CLK_PCLK 7 17*8bab661aSEmmanuel Vadot #define JZ4755_CLK_MCLK 8 18*8bab661aSEmmanuel Vadot #define JZ4755_CLK_H1CLK 9 19*8bab661aSEmmanuel Vadot #define JZ4755_CLK_UDC 10 20*8bab661aSEmmanuel Vadot #define JZ4755_CLK_LCD 11 21*8bab661aSEmmanuel Vadot #define JZ4755_CLK_UART0 12 22*8bab661aSEmmanuel Vadot #define JZ4755_CLK_UART1 13 23*8bab661aSEmmanuel Vadot #define JZ4755_CLK_UART2 14 24*8bab661aSEmmanuel Vadot #define JZ4755_CLK_DMA 15 25*8bab661aSEmmanuel Vadot #define JZ4755_CLK_MMC 16 26*8bab661aSEmmanuel Vadot #define JZ4755_CLK_MMC0 17 27*8bab661aSEmmanuel Vadot #define JZ4755_CLK_MMC1 18 28*8bab661aSEmmanuel Vadot #define JZ4755_CLK_EXT512 19 29*8bab661aSEmmanuel Vadot #define JZ4755_CLK_RTC 20 30*8bab661aSEmmanuel Vadot #define JZ4755_CLK_UDC_PHY 21 31*8bab661aSEmmanuel Vadot #define JZ4755_CLK_I2S 22 32*8bab661aSEmmanuel Vadot #define JZ4755_CLK_SPI 23 33*8bab661aSEmmanuel Vadot #define JZ4755_CLK_AIC 24 34*8bab661aSEmmanuel Vadot #define JZ4755_CLK_ADC 25 35*8bab661aSEmmanuel Vadot #define JZ4755_CLK_TCU 26 36*8bab661aSEmmanuel Vadot #define JZ4755_CLK_BCH 27 37*8bab661aSEmmanuel Vadot #define JZ4755_CLK_I2C 28 38*8bab661aSEmmanuel Vadot #define JZ4755_CLK_TVE 29 39*8bab661aSEmmanuel Vadot #define JZ4755_CLK_CIM 30 40*8bab661aSEmmanuel Vadot #define JZ4755_CLK_AUX_CPU 31 41*8bab661aSEmmanuel Vadot #define JZ4755_CLK_AHB1 32 42*8bab661aSEmmanuel Vadot #define JZ4755_CLK_IDCT 33 43*8bab661aSEmmanuel Vadot #define JZ4755_CLK_DB 34 44*8bab661aSEmmanuel Vadot #define JZ4755_CLK_ME 35 45*8bab661aSEmmanuel Vadot #define JZ4755_CLK_MC 36 46*8bab661aSEmmanuel Vadot #define JZ4755_CLK_TSSI 37 47*8bab661aSEmmanuel Vadot #define JZ4755_CLK_IPU 38 48*8bab661aSEmmanuel Vadot 49*8bab661aSEmmanuel Vadot #endif /* __DT_BINDINGS_CLOCK_JZ4755_CGU_H__ */ 50