xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h (revision aa1a8ff2d6dbc51ef058f46f3db5a8bb77967145)
1f126890aSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
2f126890aSEmmanuel Vadot /*
3f126890aSEmmanuel Vadot  * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
4f126890aSEmmanuel Vadot  * Author: Jian Hu <jian.hu@amlogic.com>
5f126890aSEmmanuel Vadot  *
6f126890aSEmmanuel Vadot  * Copyright (c) 2023, SberDevices. All Rights Reserved.
7f126890aSEmmanuel Vadot  * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru>
8f126890aSEmmanuel Vadot  */
9f126890aSEmmanuel Vadot 
10f126890aSEmmanuel Vadot #ifndef __A1_PERIPHERALS_CLKC_H
11f126890aSEmmanuel Vadot #define __A1_PERIPHERALS_CLKC_H
12f126890aSEmmanuel Vadot 
13*aa1a8ff2SEmmanuel Vadot #define CLKID_XTAL_IN		0
14f126890aSEmmanuel Vadot #define CLKID_FIXPLL_IN		1
15f126890aSEmmanuel Vadot #define CLKID_USB_PHY_IN	2
16f126890aSEmmanuel Vadot #define CLKID_USB_CTRL_IN	3
17f126890aSEmmanuel Vadot #define CLKID_HIFIPLL_IN	4
18f126890aSEmmanuel Vadot #define CLKID_SYSPLL_IN		5
19f126890aSEmmanuel Vadot #define CLKID_DDS_IN		6
20f126890aSEmmanuel Vadot #define CLKID_SYS		7
21f126890aSEmmanuel Vadot #define CLKID_CLKTREE		8
22f126890aSEmmanuel Vadot #define CLKID_RESET_CTRL	9
23f126890aSEmmanuel Vadot #define CLKID_ANALOG_CTRL	10
24f126890aSEmmanuel Vadot #define CLKID_PWR_CTRL		11
25f126890aSEmmanuel Vadot #define CLKID_PAD_CTRL		12
26f126890aSEmmanuel Vadot #define CLKID_SYS_CTRL		13
27f126890aSEmmanuel Vadot #define CLKID_TEMP_SENSOR	14
28f126890aSEmmanuel Vadot #define CLKID_AM2AXI_DIV	15
29f126890aSEmmanuel Vadot #define CLKID_SPICC_B		16
30f126890aSEmmanuel Vadot #define CLKID_SPICC_A		17
31f126890aSEmmanuel Vadot #define CLKID_MSR		18
32f126890aSEmmanuel Vadot #define CLKID_AUDIO		19
33f126890aSEmmanuel Vadot #define CLKID_JTAG_CTRL		20
34f126890aSEmmanuel Vadot #define CLKID_SARADC_EN		21
35f126890aSEmmanuel Vadot #define CLKID_PWM_EF		22
36f126890aSEmmanuel Vadot #define CLKID_PWM_CD		23
37f126890aSEmmanuel Vadot #define CLKID_PWM_AB		24
38f126890aSEmmanuel Vadot #define CLKID_CEC		25
39f126890aSEmmanuel Vadot #define CLKID_I2C_S		26
40f126890aSEmmanuel Vadot #define CLKID_IR_CTRL		27
41f126890aSEmmanuel Vadot #define CLKID_I2C_M_D		28
42f126890aSEmmanuel Vadot #define CLKID_I2C_M_C		29
43f126890aSEmmanuel Vadot #define CLKID_I2C_M_B		30
44f126890aSEmmanuel Vadot #define CLKID_I2C_M_A		31
45f126890aSEmmanuel Vadot #define CLKID_ACODEC		32
46f126890aSEmmanuel Vadot #define CLKID_OTP		33
47f126890aSEmmanuel Vadot #define CLKID_SD_EMMC_A		34
48f126890aSEmmanuel Vadot #define CLKID_USB_PHY		35
49f126890aSEmmanuel Vadot #define CLKID_USB_CTRL		36
50f126890aSEmmanuel Vadot #define CLKID_SYS_DSPB		37
51f126890aSEmmanuel Vadot #define CLKID_SYS_DSPA		38
52f126890aSEmmanuel Vadot #define CLKID_DMA		39
53f126890aSEmmanuel Vadot #define CLKID_IRQ_CTRL		40
54f126890aSEmmanuel Vadot #define CLKID_NIC		41
55f126890aSEmmanuel Vadot #define CLKID_GIC		42
56f126890aSEmmanuel Vadot #define CLKID_UART_C		43
57f126890aSEmmanuel Vadot #define CLKID_UART_B		44
58f126890aSEmmanuel Vadot #define CLKID_UART_A		45
59f126890aSEmmanuel Vadot #define CLKID_SYS_PSRAM		46
60f126890aSEmmanuel Vadot #define CLKID_RSA		47
61f126890aSEmmanuel Vadot #define CLKID_CORESIGHT		48
62f126890aSEmmanuel Vadot #define CLKID_AM2AXI_VAD	49
63f126890aSEmmanuel Vadot #define CLKID_AUDIO_VAD		50
64f126890aSEmmanuel Vadot #define CLKID_AXI_DMC		51
65f126890aSEmmanuel Vadot #define CLKID_AXI_PSRAM		52
66f126890aSEmmanuel Vadot #define CLKID_RAMB		53
67f126890aSEmmanuel Vadot #define CLKID_RAMA		54
68f126890aSEmmanuel Vadot #define CLKID_AXI_SPIFC		55
69f126890aSEmmanuel Vadot #define CLKID_AXI_NIC		56
70f126890aSEmmanuel Vadot #define CLKID_AXI_DMA		57
71f126890aSEmmanuel Vadot #define CLKID_CPU_CTRL		58
72f126890aSEmmanuel Vadot #define CLKID_ROM		59
73f126890aSEmmanuel Vadot #define CLKID_PROC_I2C		60
74*aa1a8ff2SEmmanuel Vadot #define CLKID_DSPA_SEL		61
75*aa1a8ff2SEmmanuel Vadot #define CLKID_DSPB_SEL		62
76f126890aSEmmanuel Vadot #define CLKID_DSPA_EN		63
77f126890aSEmmanuel Vadot #define CLKID_DSPA_EN_NIC	64
78f126890aSEmmanuel Vadot #define CLKID_DSPB_EN		65
79f126890aSEmmanuel Vadot #define CLKID_DSPB_EN_NIC	66
80f126890aSEmmanuel Vadot #define CLKID_RTC		67
81f126890aSEmmanuel Vadot #define CLKID_CECA_32K		68
82f126890aSEmmanuel Vadot #define CLKID_CECB_32K		69
83f126890aSEmmanuel Vadot #define CLKID_24M		70
84f126890aSEmmanuel Vadot #define CLKID_12M		71
85f126890aSEmmanuel Vadot #define CLKID_FCLK_DIV2_DIVN	72
86f126890aSEmmanuel Vadot #define CLKID_GEN		73
87*aa1a8ff2SEmmanuel Vadot #define CLKID_SARADC_SEL	74
88f126890aSEmmanuel Vadot #define CLKID_SARADC		75
89f126890aSEmmanuel Vadot #define CLKID_PWM_A		76
90f126890aSEmmanuel Vadot #define CLKID_PWM_B		77
91f126890aSEmmanuel Vadot #define CLKID_PWM_C		78
92f126890aSEmmanuel Vadot #define CLKID_PWM_D		79
93f126890aSEmmanuel Vadot #define CLKID_PWM_E		80
94f126890aSEmmanuel Vadot #define CLKID_PWM_F		81
95f126890aSEmmanuel Vadot #define CLKID_SPICC		82
96f126890aSEmmanuel Vadot #define CLKID_TS		83
97f126890aSEmmanuel Vadot #define CLKID_SPIFC		84
98f126890aSEmmanuel Vadot #define CLKID_USB_BUS		85
99f126890aSEmmanuel Vadot #define CLKID_SD_EMMC		86
100f126890aSEmmanuel Vadot #define CLKID_PSRAM		87
101f126890aSEmmanuel Vadot #define CLKID_DMC		88
102*aa1a8ff2SEmmanuel Vadot #define CLKID_SYS_A_SEL		89
103*aa1a8ff2SEmmanuel Vadot #define CLKID_SYS_A_DIV		90
104*aa1a8ff2SEmmanuel Vadot #define CLKID_SYS_A		91
105*aa1a8ff2SEmmanuel Vadot #define CLKID_SYS_B_SEL		92
106*aa1a8ff2SEmmanuel Vadot #define CLKID_SYS_B_DIV		93
107*aa1a8ff2SEmmanuel Vadot #define CLKID_SYS_B		94
108f126890aSEmmanuel Vadot #define CLKID_DSPA_A_SEL	95
109*aa1a8ff2SEmmanuel Vadot #define CLKID_DSPA_A_DIV	96
110*aa1a8ff2SEmmanuel Vadot #define CLKID_DSPA_A		97
111f126890aSEmmanuel Vadot #define CLKID_DSPA_B_SEL	98
112*aa1a8ff2SEmmanuel Vadot #define CLKID_DSPA_B_DIV	99
113*aa1a8ff2SEmmanuel Vadot #define CLKID_DSPA_B		100
114f126890aSEmmanuel Vadot #define CLKID_DSPB_A_SEL	101
115*aa1a8ff2SEmmanuel Vadot #define CLKID_DSPB_A_DIV	102
116*aa1a8ff2SEmmanuel Vadot #define CLKID_DSPB_A		103
117f126890aSEmmanuel Vadot #define CLKID_DSPB_B_SEL	104
118*aa1a8ff2SEmmanuel Vadot #define CLKID_DSPB_B_DIV	105
119*aa1a8ff2SEmmanuel Vadot #define CLKID_DSPB_B		106
120*aa1a8ff2SEmmanuel Vadot #define CLKID_RTC_32K_IN	107
121*aa1a8ff2SEmmanuel Vadot #define CLKID_RTC_32K_DIV	108
122*aa1a8ff2SEmmanuel Vadot #define CLKID_RTC_32K_XTAL	109
123*aa1a8ff2SEmmanuel Vadot #define CLKID_RTC_32K_SEL	110
124*aa1a8ff2SEmmanuel Vadot #define CLKID_CECB_32K_IN	111
125*aa1a8ff2SEmmanuel Vadot #define CLKID_CECB_32K_DIV	112
126f126890aSEmmanuel Vadot #define CLKID_CECB_32K_SEL_PRE	113
127f126890aSEmmanuel Vadot #define CLKID_CECB_32K_SEL	114
128*aa1a8ff2SEmmanuel Vadot #define CLKID_CECA_32K_IN	115
129*aa1a8ff2SEmmanuel Vadot #define CLKID_CECA_32K_DIV	116
130f126890aSEmmanuel Vadot #define CLKID_CECA_32K_SEL_PRE	117
131f126890aSEmmanuel Vadot #define CLKID_CECA_32K_SEL	118
132*aa1a8ff2SEmmanuel Vadot #define CLKID_DIV2_PRE		119
133*aa1a8ff2SEmmanuel Vadot #define CLKID_24M_DIV2		120
134f126890aSEmmanuel Vadot #define CLKID_GEN_SEL		121
135*aa1a8ff2SEmmanuel Vadot #define CLKID_GEN_DIV		122
136*aa1a8ff2SEmmanuel Vadot #define CLKID_SARADC_DIV	123
137f126890aSEmmanuel Vadot #define CLKID_PWM_A_SEL		124
138*aa1a8ff2SEmmanuel Vadot #define CLKID_PWM_A_DIV		125
139f126890aSEmmanuel Vadot #define CLKID_PWM_B_SEL		126
140*aa1a8ff2SEmmanuel Vadot #define CLKID_PWM_B_DIV		127
141f126890aSEmmanuel Vadot #define CLKID_PWM_C_SEL		128
142*aa1a8ff2SEmmanuel Vadot #define CLKID_PWM_C_DIV		129
143f126890aSEmmanuel Vadot #define CLKID_PWM_D_SEL		130
144*aa1a8ff2SEmmanuel Vadot #define CLKID_PWM_D_DIV		131
145f126890aSEmmanuel Vadot #define CLKID_PWM_E_SEL		132
146*aa1a8ff2SEmmanuel Vadot #define CLKID_PWM_E_DIV		133
147f126890aSEmmanuel Vadot #define CLKID_PWM_F_SEL		134
148*aa1a8ff2SEmmanuel Vadot #define CLKID_PWM_F_DIV		135
149*aa1a8ff2SEmmanuel Vadot #define CLKID_SPICC_SEL		136
150*aa1a8ff2SEmmanuel Vadot #define CLKID_SPICC_DIV		137
151*aa1a8ff2SEmmanuel Vadot #define CLKID_SPICC_SEL2	138
152*aa1a8ff2SEmmanuel Vadot #define CLKID_TS_DIV		139
153*aa1a8ff2SEmmanuel Vadot #define CLKID_SPIFC_SEL		140
154*aa1a8ff2SEmmanuel Vadot #define CLKID_SPIFC_DIV		141
155*aa1a8ff2SEmmanuel Vadot #define CLKID_SPIFC_SEL2	142
156*aa1a8ff2SEmmanuel Vadot #define CLKID_USB_BUS_SEL	143
157*aa1a8ff2SEmmanuel Vadot #define CLKID_USB_BUS_DIV	144
158*aa1a8ff2SEmmanuel Vadot #define CLKID_SD_EMMC_SEL	145
159*aa1a8ff2SEmmanuel Vadot #define CLKID_SD_EMMC_DIV	146
160f126890aSEmmanuel Vadot #define CLKID_SD_EMMC_SEL2	147
161*aa1a8ff2SEmmanuel Vadot #define CLKID_PSRAM_SEL		148
162*aa1a8ff2SEmmanuel Vadot #define CLKID_PSRAM_DIV		149
163*aa1a8ff2SEmmanuel Vadot #define CLKID_PSRAM_SEL2	150
164*aa1a8ff2SEmmanuel Vadot #define CLKID_DMC_SEL		151
165*aa1a8ff2SEmmanuel Vadot #define CLKID_DMC_DIV		152
166*aa1a8ff2SEmmanuel Vadot #define CLKID_DMC_SEL2		153
167f126890aSEmmanuel Vadot 
168f126890aSEmmanuel Vadot #endif /* __A1_PERIPHERALS_CLKC_H */
169