xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/actions,s700-cmu.h (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0
2*c66ec88fSEmmanuel Vadot  *
3*c66ec88fSEmmanuel Vadot  * Device Tree binding constants for Actions Semi S700 Clock Management Unit
4*c66ec88fSEmmanuel Vadot  *
5*c66ec88fSEmmanuel Vadot  * Copyright (c) 2014 Actions Semi Inc.
6*c66ec88fSEmmanuel Vadot  * Author: David Liu <liuwei@actions-semi.com>
7*c66ec88fSEmmanuel Vadot  *
8*c66ec88fSEmmanuel Vadot  * Author: Pathiban Nallathambi <pn@denx.de>
9*c66ec88fSEmmanuel Vadot  * Author: Saravanan Sekar <sravanhome@gmail.com>
10*c66ec88fSEmmanuel Vadot  */
11*c66ec88fSEmmanuel Vadot 
12*c66ec88fSEmmanuel Vadot #ifndef __DT_BINDINGS_CLOCK_S700_H
13*c66ec88fSEmmanuel Vadot #define __DT_BINDINGS_CLOCK_S700_H
14*c66ec88fSEmmanuel Vadot 
15*c66ec88fSEmmanuel Vadot #define CLK_NONE			0
16*c66ec88fSEmmanuel Vadot 
17*c66ec88fSEmmanuel Vadot /* pll clocks */
18*c66ec88fSEmmanuel Vadot #define CLK_CORE_PLL			1
19*c66ec88fSEmmanuel Vadot #define CLK_DEV_PLL			2
20*c66ec88fSEmmanuel Vadot #define CLK_DDR_PLL			3
21*c66ec88fSEmmanuel Vadot #define CLK_NAND_PLL			4
22*c66ec88fSEmmanuel Vadot #define CLK_DISPLAY_PLL			5
23*c66ec88fSEmmanuel Vadot #define CLK_TVOUT_PLL			6
24*c66ec88fSEmmanuel Vadot #define CLK_CVBS_PLL			7
25*c66ec88fSEmmanuel Vadot #define CLK_AUDIO_PLL			8
26*c66ec88fSEmmanuel Vadot #define CLK_ETHERNET_PLL		9
27*c66ec88fSEmmanuel Vadot 
28*c66ec88fSEmmanuel Vadot /* system clock */
29*c66ec88fSEmmanuel Vadot #define CLK_CPU				10
30*c66ec88fSEmmanuel Vadot #define CLK_DEV				11
31*c66ec88fSEmmanuel Vadot #define CLK_AHB				12
32*c66ec88fSEmmanuel Vadot #define CLK_APB				13
33*c66ec88fSEmmanuel Vadot #define CLK_DMAC			14
34*c66ec88fSEmmanuel Vadot #define CLK_NOC0_CLK_MUX		15
35*c66ec88fSEmmanuel Vadot #define CLK_NOC1_CLK_MUX		16
36*c66ec88fSEmmanuel Vadot #define CLK_HP_CLK_MUX			17
37*c66ec88fSEmmanuel Vadot #define CLK_HP_CLK_DIV			18
38*c66ec88fSEmmanuel Vadot #define CLK_NOC1_CLK_DIV		19
39*c66ec88fSEmmanuel Vadot #define CLK_NOC0			20
40*c66ec88fSEmmanuel Vadot #define CLK_NOC1			21
41*c66ec88fSEmmanuel Vadot #define CLK_SENOR_SRC			22
42*c66ec88fSEmmanuel Vadot 
43*c66ec88fSEmmanuel Vadot /* peripheral device clock */
44*c66ec88fSEmmanuel Vadot #define CLK_GPIO			23
45*c66ec88fSEmmanuel Vadot #define CLK_TIMER			24
46*c66ec88fSEmmanuel Vadot #define CLK_DSI				25
47*c66ec88fSEmmanuel Vadot #define CLK_CSI				26
48*c66ec88fSEmmanuel Vadot #define CLK_SI				27
49*c66ec88fSEmmanuel Vadot #define CLK_DE				28
50*c66ec88fSEmmanuel Vadot #define CLK_HDE				29
51*c66ec88fSEmmanuel Vadot #define CLK_VDE				30
52*c66ec88fSEmmanuel Vadot #define CLK_VCE				31
53*c66ec88fSEmmanuel Vadot #define CLK_NAND			32
54*c66ec88fSEmmanuel Vadot #define CLK_SD0				33
55*c66ec88fSEmmanuel Vadot #define CLK_SD1				34
56*c66ec88fSEmmanuel Vadot #define CLK_SD2				35
57*c66ec88fSEmmanuel Vadot 
58*c66ec88fSEmmanuel Vadot #define CLK_UART0			36
59*c66ec88fSEmmanuel Vadot #define CLK_UART1			37
60*c66ec88fSEmmanuel Vadot #define CLK_UART2			38
61*c66ec88fSEmmanuel Vadot #define CLK_UART3			39
62*c66ec88fSEmmanuel Vadot #define CLK_UART4			40
63*c66ec88fSEmmanuel Vadot #define CLK_UART5			41
64*c66ec88fSEmmanuel Vadot #define CLK_UART6			42
65*c66ec88fSEmmanuel Vadot 
66*c66ec88fSEmmanuel Vadot #define CLK_PWM0			43
67*c66ec88fSEmmanuel Vadot #define CLK_PWM1			44
68*c66ec88fSEmmanuel Vadot #define CLK_PWM2			45
69*c66ec88fSEmmanuel Vadot #define CLK_PWM3			46
70*c66ec88fSEmmanuel Vadot #define CLK_PWM4			47
71*c66ec88fSEmmanuel Vadot #define CLK_PWM5			48
72*c66ec88fSEmmanuel Vadot #define CLK_GPU3D			49
73*c66ec88fSEmmanuel Vadot 
74*c66ec88fSEmmanuel Vadot #define CLK_I2C0			50
75*c66ec88fSEmmanuel Vadot #define CLK_I2C1			51
76*c66ec88fSEmmanuel Vadot #define CLK_I2C2			52
77*c66ec88fSEmmanuel Vadot #define CLK_I2C3			53
78*c66ec88fSEmmanuel Vadot 
79*c66ec88fSEmmanuel Vadot #define CLK_SPI0			54
80*c66ec88fSEmmanuel Vadot #define CLK_SPI1			55
81*c66ec88fSEmmanuel Vadot #define CLK_SPI2			56
82*c66ec88fSEmmanuel Vadot #define CLK_SPI3			57
83*c66ec88fSEmmanuel Vadot 
84*c66ec88fSEmmanuel Vadot #define CLK_USB3_480MPLL0		58
85*c66ec88fSEmmanuel Vadot #define CLK_USB3_480MPHY0		59
86*c66ec88fSEmmanuel Vadot #define CLK_USB3_5GPHY			60
87*c66ec88fSEmmanuel Vadot #define CLK_USB3_CCE			61
88*c66ec88fSEmmanuel Vadot #define CLK_USB3_MAC			62
89*c66ec88fSEmmanuel Vadot 
90*c66ec88fSEmmanuel Vadot #define CLK_LCD				63
91*c66ec88fSEmmanuel Vadot #define CLK_HDMI_AUDIO			64
92*c66ec88fSEmmanuel Vadot #define CLK_I2SRX			65
93*c66ec88fSEmmanuel Vadot #define CLK_I2STX			66
94*c66ec88fSEmmanuel Vadot 
95*c66ec88fSEmmanuel Vadot #define CLK_SENSOR0			67
96*c66ec88fSEmmanuel Vadot #define CLK_SENSOR1			68
97*c66ec88fSEmmanuel Vadot 
98*c66ec88fSEmmanuel Vadot #define CLK_HDMI_DEV			69
99*c66ec88fSEmmanuel Vadot 
100*c66ec88fSEmmanuel Vadot #define CLK_ETHERNET			70
101*c66ec88fSEmmanuel Vadot #define CLK_RMII_REF			71
102*c66ec88fSEmmanuel Vadot 
103*c66ec88fSEmmanuel Vadot #define CLK_USB2H0_PLLEN		72
104*c66ec88fSEmmanuel Vadot #define CLK_USB2H0_PHY			73
105*c66ec88fSEmmanuel Vadot #define CLK_USB2H0_CCE			74
106*c66ec88fSEmmanuel Vadot #define CLK_USB2H1_PLLEN		75
107*c66ec88fSEmmanuel Vadot #define CLK_USB2H1_PHY			76
108*c66ec88fSEmmanuel Vadot #define CLK_USB2H1_CCE			77
109*c66ec88fSEmmanuel Vadot 
110*c66ec88fSEmmanuel Vadot #define CLK_TVOUT			78
111*c66ec88fSEmmanuel Vadot 
112*c66ec88fSEmmanuel Vadot #define CLK_THERMAL_SENSOR		79
113*c66ec88fSEmmanuel Vadot 
114*c66ec88fSEmmanuel Vadot #define CLK_IRC_SWITCH			80
115*c66ec88fSEmmanuel Vadot #define CLK_PCM1			81
116*c66ec88fSEmmanuel Vadot #define CLK_NR_CLKS			(CLK_PCM1 + 1)
117*c66ec88fSEmmanuel Vadot 
118*c66ec88fSEmmanuel Vadot #endif /* __DT_BINDINGS_CLOCK_S700_H */
119