1c66ec88fSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2c66ec88fSEmmanuel Vadot%YAML 1.2 3c66ec88fSEmmanuel Vadot--- 4c66ec88fSEmmanuel Vadot$id: http://devicetree.org/schemas/watchdog/ti,rti-wdt.yaml# 5c66ec88fSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6c66ec88fSEmmanuel Vadot 7c66ec88fSEmmanuel Vadottitle: Texas Instruments K3 SoC Watchdog Timer 8c66ec88fSEmmanuel Vadot 9c66ec88fSEmmanuel Vadotmaintainers: 10c66ec88fSEmmanuel Vadot - Tero Kristo <t-kristo@ti.com> 11c66ec88fSEmmanuel Vadot 12c66ec88fSEmmanuel Vadotdescription: 13c66ec88fSEmmanuel Vadot The TI K3 SoC watchdog timer is implemented via the RTI (Real Time 14c66ec88fSEmmanuel Vadot Interrupt) IP module. This timer adds a support for windowed watchdog 15c66ec88fSEmmanuel Vadot mode, which will signal an error if it is pinged outside the watchdog 16c66ec88fSEmmanuel Vadot time window, meaning either too early or too late. The error signal 17c66ec88fSEmmanuel Vadot generated can be routed to either interrupt a safety controller or 18c66ec88fSEmmanuel Vadot to directly reset the SoC. 19c66ec88fSEmmanuel Vadot 20c66ec88fSEmmanuel VadotallOf: 21fac71e4eSEmmanuel Vadot - $ref: watchdog.yaml# 22c66ec88fSEmmanuel Vadot 23c66ec88fSEmmanuel Vadotproperties: 24c66ec88fSEmmanuel Vadot compatible: 25c66ec88fSEmmanuel Vadot enum: 26c66ec88fSEmmanuel Vadot - ti,j7-rti-wdt 27c66ec88fSEmmanuel Vadot 28c66ec88fSEmmanuel Vadot reg: 29c66ec88fSEmmanuel Vadot maxItems: 1 30c66ec88fSEmmanuel Vadot 31c66ec88fSEmmanuel Vadot clocks: 32c66ec88fSEmmanuel Vadot maxItems: 1 33c66ec88fSEmmanuel Vadot 34c66ec88fSEmmanuel Vadot power-domains: 35c66ec88fSEmmanuel Vadot maxItems: 1 36c66ec88fSEmmanuel Vadot 37*aa1a8ff2SEmmanuel Vadot memory-region: 38*aa1a8ff2SEmmanuel Vadot maxItems: 1 39*aa1a8ff2SEmmanuel Vadot description: 40*aa1a8ff2SEmmanuel Vadot Contains the watchdog reserved memory. It is optional. 41*aa1a8ff2SEmmanuel Vadot In the reserved memory, the specified values, which are 42*aa1a8ff2SEmmanuel Vadot PON_REASON_SOF_NUM(0xBBBBCCCC), PON_REASON_MAGIC_NUM(0xDDDDDDDD), 43*aa1a8ff2SEmmanuel Vadot and PON_REASON_EOF_NUM(0xCCCCBBBB), are pre-stored at the first 44*aa1a8ff2SEmmanuel Vadot 3 * 4 bytes to tell that last boot was caused by watchdog reset. 45*aa1a8ff2SEmmanuel Vadot Once the PON reason is captured by driver(rti_wdt.c), the driver 46*aa1a8ff2SEmmanuel Vadot is supposed to wipe the whole memory region. Surely, if this 47*aa1a8ff2SEmmanuel Vadot property is set, at least 12 bytes reserved memory starting from 48*aa1a8ff2SEmmanuel Vadot specific memory address(0xa220000) should be set. More please 49*aa1a8ff2SEmmanuel Vadot refer to example. 50*aa1a8ff2SEmmanuel Vadot 51c66ec88fSEmmanuel Vadotrequired: 52c66ec88fSEmmanuel Vadot - compatible 53c66ec88fSEmmanuel Vadot - reg 54c66ec88fSEmmanuel Vadot - clocks 55c66ec88fSEmmanuel Vadot - power-domains 56c66ec88fSEmmanuel Vadot 576be33864SEmmanuel VadotunevaluatedProperties: false 586be33864SEmmanuel Vadot 59c66ec88fSEmmanuel Vadotexamples: 60c66ec88fSEmmanuel Vadot - | 61c66ec88fSEmmanuel Vadot /* 62c66ec88fSEmmanuel Vadot * RTI WDT in main domain on J721e SoC. Assigned clocks are used to 63c66ec88fSEmmanuel Vadot * select the source clock for the watchdog, forcing it to tick with 64*aa1a8ff2SEmmanuel Vadot * a 32kHz clock in this case. Add a reserved memory(optional) to keep 65*aa1a8ff2SEmmanuel Vadot * the watchdog reset cause persistent, which was be written in 12 bytes 66*aa1a8ff2SEmmanuel Vadot * starting from 0xa2200000 by RTI Watchdog Firmware, then make it 67*aa1a8ff2SEmmanuel Vadot * possible to get watchdog reset cause in driver. 68*aa1a8ff2SEmmanuel Vadot * 69*aa1a8ff2SEmmanuel Vadot * Reserved memory should be defined as follows: 70*aa1a8ff2SEmmanuel Vadot * reserved-memory { 71*aa1a8ff2SEmmanuel Vadot * wdt_reset_memory_region: wdt-memory@a2200000 { 72*aa1a8ff2SEmmanuel Vadot * reg = <0x00 0xa2200000 0x00 0x1000>; 73*aa1a8ff2SEmmanuel Vadot * no-map; 74*aa1a8ff2SEmmanuel Vadot * }; 75*aa1a8ff2SEmmanuel Vadot * } 76c66ec88fSEmmanuel Vadot */ 77c66ec88fSEmmanuel Vadot #include <dt-bindings/soc/ti,sci_pm_domain.h> 78c66ec88fSEmmanuel Vadot 795def4c47SEmmanuel Vadot watchdog@2200000 { 805def4c47SEmmanuel Vadot compatible = "ti,j7-rti-wdt"; 81c66ec88fSEmmanuel Vadot reg = <0x2200000 0x100>; 82c66ec88fSEmmanuel Vadot clocks = <&k3_clks 252 1>; 83c66ec88fSEmmanuel Vadot power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>; 84c66ec88fSEmmanuel Vadot assigned-clocks = <&k3_clks 252 1>; 85c66ec88fSEmmanuel Vadot assigned-clock-parents = <&k3_clks 252 5>; 86*aa1a8ff2SEmmanuel Vadot memory-region = <&wdt_reset_memory_region>; 87c66ec88fSEmmanuel Vadot }; 88