xref: /freebsd/sys/contrib/device-tree/Bindings/watchdog/realtek,otto-wdt.yaml (revision 38a52bd3b5cac3da6f7f6eef3dd050e6aa08ebb3) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/watchdog/realtek,otto-wdt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Realtek Otto watchdog timer
8
9maintainers:
10  - Sander Vanheule <sander@svanheule.net>
11
12description: |
13  The timer has two timeout phases. Both phases have a maximum duration of 32
14  prescaled clock ticks, which is ca. 43s with a bus clock of 200MHz. The
15  minimum duration of each phase is one tick. Each phase can trigger an
16  interrupt, although the phase 2 interrupt will occur with the system reset.
17  - Phase 1: During this phase, the WDT can be pinged to reset the timeout.
18  - Phase 2: Starts after phase 1 has timed out, and only serves to give the
19    system some time to clean up, or notify others that it's going to reset.
20    During this phase, pinging the WDT has no effect, and a reset is
21    unavoidable, unless the WDT is disabled.
22
23allOf:
24  - $ref: watchdog.yaml#
25
26properties:
27  compatible:
28    enum:
29      - realtek,rtl8380-wdt
30      - realtek,rtl8390-wdt
31      - realtek,rtl9300-wdt
32
33  reg:
34    maxItems: 1
35
36  clocks:
37    maxItems: 1
38
39  interrupts:
40    items:
41      - description: interrupt specifier for pretimeout
42      - description: interrupt specifier for timeout
43
44  interrupt-names:
45    items:
46      - const: phase1
47      - const: phase2
48
49  realtek,reset-mode:
50    $ref: /schemas/types.yaml#/definitions/string
51    description: |
52      Specify how the system is reset after a timeout. Defaults to "cpu" if
53      left unspecified.
54    oneOf:
55      - description: Reset the entire chip
56        const: soc
57      - description: |
58          Reset the CPU and IPsec engine, but leave other peripherals untouched
59        const: cpu
60      - description: |
61          Reset the execution pointer, but don't actually reset any hardware
62        const: software
63
64required:
65  - compatible
66  - reg
67  - clocks
68  - interrupts
69
70unevaluatedProperties: false
71
72dependencies:
73  interrupts: [ interrupt-names ]
74
75examples:
76  - |
77    watchdog: watchdog@3150 {
78        compatible = "realtek,rtl8380-wdt";
79        reg = <0x3150 0xc>;
80
81        realtek,reset-mode = "soc";
82
83        clocks = <&lxbus_clock>;
84        timeout-sec = <20>;
85
86        interrupt-parent = <&rtlintc>;
87        interrupt-names = "phase1", "phase2";
88        interrupts = <19>, <18>;
89    };
90
91...
92