xref: /freebsd/sys/contrib/device-tree/Bindings/watchdog/mediatek,mtk-wdt.yaml (revision f81cdf24ba5436367377f7c8e8f51f6df2a75ca7) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/watchdog/mediatek,mtk-wdt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek SoCs Watchdog timer
8
9maintainers:
10  - Matthias Brugger <matthias.bgg@gmail.com>
11
12description:
13  The watchdog supports a pre-timeout interrupt that fires
14  timeout-sec/2 before the expiry.
15
16allOf:
17  - $ref: watchdog.yaml#
18
19properties:
20  compatible:
21    oneOf:
22      - enum:
23          - mediatek,mt2712-wdt
24          - mediatek,mt6589-wdt
25          - mediatek,mt6735-wdt
26          - mediatek,mt6795-wdt
27          - mediatek,mt7986-wdt
28          - mediatek,mt8183-wdt
29          - mediatek,mt8186-wdt
30          - mediatek,mt8188-wdt
31          - mediatek,mt8192-wdt
32          - mediatek,mt8195-wdt
33      - items:
34          - enum:
35              - mediatek,mt2701-wdt
36              - mediatek,mt6582-wdt
37              - mediatek,mt6797-wdt
38              - mediatek,mt7622-wdt
39              - mediatek,mt7623-wdt
40              - mediatek,mt7629-wdt
41              - mediatek,mt8173-wdt
42              - mediatek,mt8365-wdt
43              - mediatek,mt8516-wdt
44          - const: mediatek,mt6589-wdt
45
46  reg:
47    maxItems: 1
48
49  interrupts:
50    items:
51      - description: Watchdog pre-timeout (bark) interrupt
52
53  mediatek,disable-extrst:
54    description: Disable sending output reset signal
55    type: boolean
56
57  mediatek,reset-by-toprgu:
58    description: The Top Reset Generation Unit (TOPRGU) generates reset signals
59      and distributes them to each IP. If present, the watchdog timer will be
60      reset by TOPRGU once system resets.
61    type: boolean
62
63  '#reset-cells':
64    const: 1
65
66required:
67  - compatible
68  - reg
69
70unevaluatedProperties: false
71
72examples:
73  - |
74    #include <dt-bindings/interrupt-controller/arm-gic.h>
75
76    soc {
77        #address-cells = <2>;
78        #size-cells = <2>;
79
80        watchdog: watchdog@10007000 {
81            compatible = "mediatek,mt8183-wdt";
82            reg = <0 0x10007000 0 0x100>;
83            interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_LOW>;
84            mediatek,disable-extrst;
85            timeout-sec = <10>;
86            #reset-cells = <1>;
87        };
88    };
89