xref: /freebsd/sys/contrib/device-tree/Bindings/watchdog/fsl-imx7ulp-wdt.yaml (revision fac71e4e09885bb2afa3d984a0c239a52e1a7418) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/watchdog/fsl-imx7ulp-wdt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX7ULP Watchdog Timer (WDT) Controller
8
9maintainers:
10  - Anson Huang <Anson.Huang@nxp.com>
11
12allOf:
13  - $ref: watchdog.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - const: fsl,imx7ulp-wdt
19      - items:
20          - const: fsl,imx8ulp-wdt
21          - const: fsl,imx7ulp-wdt
22      - const: fsl,imx93-wdt
23
24  reg:
25    maxItems: 1
26
27  interrupts:
28    maxItems: 1
29
30  clocks:
31    maxItems: 1
32
33required:
34  - compatible
35  - interrupts
36  - reg
37  - clocks
38
39unevaluatedProperties: false
40
41examples:
42  - |
43    #include <dt-bindings/interrupt-controller/arm-gic.h>
44    #include <dt-bindings/clock/imx7ulp-clock.h>
45
46    watchdog@403d0000 {
47        compatible = "fsl,imx7ulp-wdt";
48        reg = <0x403d0000 0x10000>;
49        interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
50        clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
51        assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
52        assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
53        timeout-sec = <40>;
54    };
55
56...
57