16be33864SEmmanuel Vadot# SPDX-License-Identifier: GPL-2.0 26be33864SEmmanuel Vadot%YAML 1.2 36be33864SEmmanuel Vadot--- 46be33864SEmmanuel Vadot$id: http://devicetree.org/schemas/watchdog/arm,sp805.yaml# 56be33864SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 66be33864SEmmanuel Vadot 76be33864SEmmanuel Vadottitle: ARM AMBA Primecell SP805 Watchdog 86be33864SEmmanuel Vadot 96be33864SEmmanuel Vadotmaintainers: 106be33864SEmmanuel Vadot - Viresh Kumar <vireshk@kernel.org> 116be33864SEmmanuel Vadot 126be33864SEmmanuel Vadotdescription: |+ 136be33864SEmmanuel Vadot The Arm SP805 IP implements a watchdog device, which triggers an interrupt 146be33864SEmmanuel Vadot after a configurable time period. If that interrupt has not been serviced 156be33864SEmmanuel Vadot when the next interrupt would be triggered, the reset signal is asserted. 166be33864SEmmanuel Vadot 176be33864SEmmanuel VadotallOf: 186be33864SEmmanuel Vadot - $ref: /schemas/watchdog/watchdog.yaml# 196be33864SEmmanuel Vadot 206be33864SEmmanuel Vadot# Need a custom select here or 'arm,primecell' will match on lots of nodes 216be33864SEmmanuel Vadotselect: 226be33864SEmmanuel Vadot properties: 236be33864SEmmanuel Vadot compatible: 246be33864SEmmanuel Vadot contains: 256be33864SEmmanuel Vadot const: arm,sp805 266be33864SEmmanuel Vadot required: 276be33864SEmmanuel Vadot - compatible 286be33864SEmmanuel Vadot 296be33864SEmmanuel Vadotproperties: 306be33864SEmmanuel Vadot compatible: 316be33864SEmmanuel Vadot items: 326be33864SEmmanuel Vadot - const: arm,sp805 336be33864SEmmanuel Vadot - const: arm,primecell 346be33864SEmmanuel Vadot 356be33864SEmmanuel Vadot interrupts: 366be33864SEmmanuel Vadot maxItems: 1 376be33864SEmmanuel Vadot 386be33864SEmmanuel Vadot reg: 396be33864SEmmanuel Vadot maxItems: 1 406be33864SEmmanuel Vadot 416be33864SEmmanuel Vadot clocks: 426be33864SEmmanuel Vadot description: | 436be33864SEmmanuel Vadot Clocks driving the watchdog timer hardware. The first clock is used 446be33864SEmmanuel Vadot for the actual watchdog counter. The second clock drives the register 456be33864SEmmanuel Vadot interface. 466be33864SEmmanuel Vadot maxItems: 2 476be33864SEmmanuel Vadot 486be33864SEmmanuel Vadot clock-names: 496be33864SEmmanuel Vadot items: 506be33864SEmmanuel Vadot - const: wdog_clk 516be33864SEmmanuel Vadot - const: apb_pclk 526be33864SEmmanuel Vadot 53*01950c46SEmmanuel Vadot resets: 54*01950c46SEmmanuel Vadot maxItems: 1 55*01950c46SEmmanuel Vadot description: WDOGRESn input reset signal for sp805 module. 56*01950c46SEmmanuel Vadot 576be33864SEmmanuel Vadotrequired: 586be33864SEmmanuel Vadot - compatible 596be33864SEmmanuel Vadot - reg 606be33864SEmmanuel Vadot - clocks 616be33864SEmmanuel Vadot - clock-names 626be33864SEmmanuel Vadot 636be33864SEmmanuel VadotunevaluatedProperties: false 646be33864SEmmanuel Vadot 656be33864SEmmanuel Vadotexamples: 666be33864SEmmanuel Vadot - | 676be33864SEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 686be33864SEmmanuel Vadot watchdog@66090000 { 696be33864SEmmanuel Vadot compatible = "arm,sp805", "arm,primecell"; 706be33864SEmmanuel Vadot reg = <0x66090000 0x1000>; 716be33864SEmmanuel Vadot interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>; 726be33864SEmmanuel Vadot clocks = <&wdt_clk>, <&apb_pclk>; 736be33864SEmmanuel Vadot clock-names = "wdog_clk", "apb_pclk"; 74*01950c46SEmmanuel Vadot resets = <&wdt_rst>; 756be33864SEmmanuel Vadot }; 76