1*c66ec88fSEmmanuel VadotUx500 MUSB 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot - compatible : Should be "stericsson,db8500-musb" 5*c66ec88fSEmmanuel Vadot - reg : Offset and length of registers 6*c66ec88fSEmmanuel Vadot - interrupts : Interrupt; mode, number and trigger 7*c66ec88fSEmmanuel Vadot - dr_mode : Dual-role; either host mode "host", peripheral mode "peripheral" 8*c66ec88fSEmmanuel Vadot or both "otg" 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel VadotOptional properties: 11*c66ec88fSEmmanuel Vadot - dmas : A list of dma channels; 12*c66ec88fSEmmanuel Vadot dma-controller, event-line, fixed-channel, flags 13*c66ec88fSEmmanuel Vadot - dma-names : An ordered list of channel names affiliated to the above 14*c66ec88fSEmmanuel Vadot 15*c66ec88fSEmmanuel VadotExample: 16*c66ec88fSEmmanuel Vadot 17*c66ec88fSEmmanuel Vadotusb_per5@a03e0000 { 18*c66ec88fSEmmanuel Vadot compatible = "stericsson,db8500-musb"; 19*c66ec88fSEmmanuel Vadot reg = <0xa03e0000 0x10000>; 20*c66ec88fSEmmanuel Vadot interrupts = <0 23 0x4>; 21*c66ec88fSEmmanuel Vadot interrupt-names = "mc"; 22*c66ec88fSEmmanuel Vadot 23*c66ec88fSEmmanuel Vadot dr_mode = "otg"; 24*c66ec88fSEmmanuel Vadot 25*c66ec88fSEmmanuel Vadot dmas = <&dma 38 0 0x2>, /* Logical - DevToMem */ 26*c66ec88fSEmmanuel Vadot <&dma 38 0 0x0>, /* Logical - MemToDev */ 27*c66ec88fSEmmanuel Vadot <&dma 37 0 0x2>, /* Logical - DevToMem */ 28*c66ec88fSEmmanuel Vadot <&dma 37 0 0x0>, /* Logical - MemToDev */ 29*c66ec88fSEmmanuel Vadot <&dma 36 0 0x2>, /* Logical - DevToMem */ 30*c66ec88fSEmmanuel Vadot <&dma 36 0 0x0>, /* Logical - MemToDev */ 31*c66ec88fSEmmanuel Vadot <&dma 19 0 0x2>, /* Logical - DevToMem */ 32*c66ec88fSEmmanuel Vadot <&dma 19 0 0x0>, /* Logical - MemToDev */ 33*c66ec88fSEmmanuel Vadot <&dma 18 0 0x2>, /* Logical - DevToMem */ 34*c66ec88fSEmmanuel Vadot <&dma 18 0 0x0>, /* Logical - MemToDev */ 35*c66ec88fSEmmanuel Vadot <&dma 17 0 0x2>, /* Logical - DevToMem */ 36*c66ec88fSEmmanuel Vadot <&dma 17 0 0x0>, /* Logical - MemToDev */ 37*c66ec88fSEmmanuel Vadot <&dma 16 0 0x2>, /* Logical - DevToMem */ 38*c66ec88fSEmmanuel Vadot <&dma 16 0 0x0>, /* Logical - MemToDev */ 39*c66ec88fSEmmanuel Vadot <&dma 39 0 0x2>, /* Logical - DevToMem */ 40*c66ec88fSEmmanuel Vadot <&dma 39 0 0x0>; /* Logical - MemToDev */ 41*c66ec88fSEmmanuel Vadot 42*c66ec88fSEmmanuel Vadot dma-names = "iep_1_9", "oep_1_9", 43*c66ec88fSEmmanuel Vadot "iep_2_10", "oep_2_10", 44*c66ec88fSEmmanuel Vadot "iep_3_11", "oep_3_11", 45*c66ec88fSEmmanuel Vadot "iep_4_12", "oep_4_12", 46*c66ec88fSEmmanuel Vadot "iep_5_13", "oep_5_13", 47*c66ec88fSEmmanuel Vadot "iep_6_14", "oep_6_14", 48*c66ec88fSEmmanuel Vadot "iep_7_15", "oep_7_15", 49*c66ec88fSEmmanuel Vadot "iep_8", "oep_8"; 50*c66ec88fSEmmanuel Vadot}; 51