xref: /freebsd/sys/contrib/device-tree/Bindings/usb/nvidia,tegra124-xusb.txt (revision 43a5ec4eb41567cc92586503212743d89686d78f)
1NVIDIA Tegra xHCI controller
2============================
3
4The Tegra xHCI controller supports both USB2 and USB3 interfaces exposed by
5the Tegra XUSB pad controller.
6
7Required properties:
8--------------------
9- compatible: Must be:
10  - Tegra124: "nvidia,tegra124-xusb"
11  - Tegra132: "nvidia,tegra132-xusb", "nvidia,tegra124-xusb"
12  - Tegra210: "nvidia,tegra210-xusb"
13  - Tegra186: "nvidia,tegra186-xusb"
14- reg: Must contain the base and length of the xHCI host registers, XUSB FPCI
15  registers and XUSB IPFS registers.
16- reg-names: Must contain the following entries:
17  - "hcd"
18  - "fpci"
19  - "ipfs"
20- interrupts: Must contain the xHCI host interrupt and the mailbox interrupt.
21- clocks: Must contain an entry for each entry in clock-names.
22  See ../clock/clock-bindings.txt for details.
23- clock-names: Must include the following entries:
24   - xusb_host
25   - xusb_host_src
26   - xusb_falcon_src
27   - xusb_ss
28   - xusb_ss_src
29   - xusb_ss_div2
30   - xusb_hs_src
31   - xusb_fs_src
32   - pll_u_480m
33   - clk_m
34   - pll_e
35- resets: Must contain an entry for each entry in reset-names.
36  See ../reset/reset.txt for details.
37- reset-names: Must include the following entries:
38  - xusb_host
39  - xusb_ss
40  - xusb_src
41  Note that xusb_src is the shared reset for xusb_{ss,hs,fs,falcon,host}_src.
42- nvidia,xusb-padctl: phandle to the XUSB pad controller that is used to
43  configure the USB pads used by the XHCI controller
44
45For Tegra124 and Tegra132:
46- avddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
47- dvddio-pex-supply: PCIe/USB3 digital logic power supply. Must supply 1.05 V.
48- avdd-usb-supply: USB controller power supply. Must supply 3.3 V.
49- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.
50- avdd-pll-erefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.
51- avdd-usb-ss-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.
52- hvdd-usb-ss-supply: High-voltage PCIe/USB3 power supply. Must supply 3.3 V.
53- hvdd-usb-ss-pll-e-supply: High-voltage PLLE power supply. Must supply 3.3 V.
54
55For Tegra210:
56- dvddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
57- hvddio-pex-supply: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
58- avdd-usb-supply: USB controller power supply. Must supply 3.3 V.
59- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.
60- avdd-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.
61- dvdd-pex-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.
62- hvdd-pex-pll-e-supply: High-voltage PLLE power supply. Must supply 1.8 V.
63
64For Tegra210 and Tegra186:
65- power-domains: A list of PM domain specifiers that reference each power-domain
66  used by the xHCI controller. This list must comprise of a specifier for the
67  XUSBA and XUSBC power-domains. See ../power/power_domain.txt and
68  ../arm/tegra/nvidia,tegra20-pmc.txt for details.
69- power-domain-names: A list of names that represent each of the specifiers in
70  the 'power-domains' property. Must include 'xusb_ss' and 'xusb_host' which
71  represent the power-domains XUSBA and XUSBC, respectively. See
72  ../power/power_domain.txt for details.
73
74Optional properties:
75--------------------
76- phys: Must contain an entry for each entry in phy-names.
77  See ../phy/phy-bindings.txt for details.
78- phy-names: Should include an entry for each PHY used by the controller. The
79  following PHYs are available:
80  - Tegra124: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1
81  - Tegra132: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1
82  - Tegra210: usb2-0, usb2-1, usb2-2, usb2-3, hsic-0, usb3-0, usb3-1, usb3-2,
83              usb3-3
84  - Tegra186: usb2-0, usb2-1, usb2-2, hsic-0, usb3-0, usb3-1, usb3-2
85
86Example:
87--------
88
89	usb@0,70090000 {
90		compatible = "nvidia,tegra124-xusb";
91		reg = <0x0 0x70090000 0x0 0x8000>,
92		      <0x0 0x70098000 0x0 0x1000>,
93		      <0x0 0x70099000 0x0 0x1000>;
94		reg-names = "hcd", "fpci", "ipfs";
95
96		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
97			     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
98
99		clocks = <&tegra_car TEGRA124_CLK_XUSB_HOST>,
100			 <&tegra_car TEGRA124_CLK_XUSB_HOST_SRC>,
101			 <&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>,
102			 <&tegra_car TEGRA124_CLK_XUSB_SS>,
103			 <&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>,
104			 <&tegra_car TEGRA124_CLK_XUSB_SS_SRC>,
105			 <&tegra_car TEGRA124_CLK_XUSB_HS_SRC>,
106			 <&tegra_car TEGRA124_CLK_XUSB_FS_SRC>,
107			 <&tegra_car TEGRA124_CLK_PLL_U_480M>,
108			 <&tegra_car TEGRA124_CLK_CLK_M>,
109			 <&tegra_car TEGRA124_CLK_PLL_E>;
110		clock-names = "xusb_host", "xusb_host_src", "xusb_falcon_src",
111			      "xusb_ss", "xusb_ss_div2", "xusb_ss_src",
112			      "xusb_hs_src", "xusb_fs_src", "pll_u_480m",
113			      "clk_m", "pll_e";
114		resets = <&tegra_car 89>, <&tegra_car 156>, <&tegra_car 143>;
115		reset-names = "xusb_host", "xusb_ss", "xusb_src";
116
117		nvidia,xusb-padctl = <&padctl>;
118
119		phys = <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-1}>, /* mini-PCIe USB */
120		       <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-2}>, /* USB A */
121		       <&{/padctl@0,7009f000/pads/pcie/lanes/pcie-0}>; /* USB A */
122		phy-names = "usb2-1", "usb2-2", "usb3-0";
123
124		avddio-pex-supply = <&vdd_1v05_run>;
125		dvddio-pex-supply = <&vdd_1v05_run>;
126		avdd-usb-supply = <&vdd_3v3_lp0>;
127		avdd-pll-utmip-supply = <&vddio_1v8>;
128		avdd-pll-erefe-supply = <&avdd_1v05_run>;
129		avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
130		hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
131		hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
132	};
133