xref: /freebsd/sys/contrib/device-tree/Bindings/usb/fsl,imx8mp-dwc3.yaml (revision 924226fba12cc9a228c73b956e1b7fa24c60b055) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (c) 2020 NXP
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: NXP iMX8MP Soc USB Controller
9
10maintainers:
11  - Li Jun <jun.li@nxp.com>
12
13properties:
14  compatible:
15    const: fsl,imx8mp-dwc3
16
17  reg:
18    maxItems: 1
19    description: Address and length of the register set for the wrapper of
20      dwc3 core on the SOC.
21
22  "#address-cells":
23    enum: [ 1, 2 ]
24
25  "#size-cells":
26    enum: [ 1, 2 ]
27
28  dma-ranges:
29    description:
30      See section 2.3.9 of the DeviceTree Specification.
31
32  ranges: true
33
34  interrupts:
35    maxItems: 1
36    description: The interrupt that is asserted when a wakeup event is
37      received.
38
39  clocks:
40    description:
41      A list of phandle and clock-specifier pairs for the clocks
42      listed in clock-names.
43    items:
44      - description: system hsio root clock.
45      - description: suspend clock, used for usb wakeup logic.
46
47  clock-names:
48    items:
49      - const: hsio
50      - const: suspend
51
52# Required child node:
53
54patternProperties:
55  "^usb@[0-9a-f]+$":
56    $ref: snps,dwc3.yaml#
57
58required:
59  - compatible
60  - reg
61  - "#address-cells"
62  - "#size-cells"
63  - dma-ranges
64  - ranges
65  - clocks
66  - clock-names
67  - interrupts
68
69additionalProperties: false
70
71examples:
72  - |
73    #include <dt-bindings/clock/imx8mp-clock.h>
74    #include <dt-bindings/interrupt-controller/arm-gic.h>
75    usb3_0: usb@32f10100 {
76      compatible = "fsl,imx8mp-dwc3";
77      reg = <0x32f10100 0x8>;
78      clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
79               <&clk IMX8MP_CLK_USB_ROOT>;
80      clock-names = "hsio", "suspend";
81      interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
82      #address-cells = <1>;
83      #size-cells = <1>;
84      dma-ranges = <0x40000000 0x40000000 0xc0000000>;
85      ranges;
86
87      usb@38100000 {
88        compatible = "snps,dwc3";
89        reg = <0x38100000 0x10000>;
90        clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
91                 <&clk IMX8MP_CLK_USB_CORE_REF>,
92                 <&clk IMX8MP_CLK_USB_ROOT>;
93        clock-names = "bus_early", "ref", "suspend";
94        assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
95        assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
96        assigned-clock-rates = <500000000>;
97        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
98        phys = <&usb3_phy0>, <&usb3_phy0>;
99        phy-names = "usb2-phy", "usb3-phy";
100        snps,dis-u2-freeclk-exists-quirk;
101      };
102    };
103