xref: /freebsd/sys/contrib/device-tree/Bindings/usb/fsl,imx8mp-dwc3.yaml (revision aa1a8ff2d6dbc51ef058f46f3db5a8bb77967145)

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (c) 2020 NXP
%YAML 1.2
---
$id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP iMX8MP Soc USB Controller

maintainers:
  - Li Jun <jun.li@nxp.com>

properties:
  compatible:
    const: fsl,imx8mp-dwc3

  reg:
    items:
      - description: Address and length of the register set for HSIO Block Control
      - description: Address and length of the register set for the wrapper of dwc3 core on the SOC.

  "#address-cells":
    enum: [ 1, 2 ]

  "#size-cells":
    enum: [ 1, 2 ]

  dma-ranges:
    description:
      See section 2.3.9 of the DeviceTree Specification.

  ranges: true

  interrupts:
    maxItems: 1
    description: The interrupt that is asserted when a wakeup event is
      received.

  clocks:
    description:
      A list of phandle and clock-specifier pairs for the clocks
      listed in clock-names.
    items:
      - description: system hsio root clock.
      - description: suspend clock, used for usb wakeup logic.

  clock-names:
    items:
      - const: hsio
      - const: suspend

  fsl,permanently-attached:
    type: boolean
    description:
      Indicates if the device attached to a downstream port is
      permanently attached.

  fsl,disable-port-power-control:
    type: boolean
    description:
      Indicates whether the host controller implementation includes port
      power control. Defines Bit 3 in capability register (HCCPARAMS).

  fsl,over-current-active-low:
    type: boolean
    description:
      Over current signal polarity is active low.

  fsl,power-active-low:
    type: boolean
    description:
      Power pad (PWR) polarity is active low.

  power-domains:
    maxItems: 1

# Required child node:

patternProperties:
  "^usb@[0-9a-f]+$":
    $ref: snps,dwc3.yaml#

required:
  - compatible
  - reg
  - "#address-cells"
  - "#size-cells"
  - dma-ranges
  - ranges
  - clocks
  - clock-names
  - interrupts
  - power-domains

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/imx8mp-clock.h>
    #include <dt-bindings/power/imx8mp-power.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    usb3_0: usb@32f10100 {
      compatible = "fsl,imx8mp-dwc3";
      reg = <0x32f10100 0x8>,
            <0x381f0000 0x20>;
      clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
               <&clk IMX8MP_CLK_USB_ROOT>;
      clock-names = "hsio", "suspend";
      interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
      power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>;
      #address-cells = <1>;
      #size-cells = <1>;
      dma-ranges = <0x40000000 0x40000000 0xc0000000>;
      ranges;

      usb@38100000 {
        compatible = "snps,dwc3";
        reg = <0x38100000 0x10000>;
        clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
                 <&clk IMX8MP_CLK_USB_CORE_REF>,
                 <&clk IMX8MP_CLK_USB_ROOT>;
        clock-names = "bus_early", "ref", "suspend";
        assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
        assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
        assigned-clock-rates = <500000000>;
        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
        phys = <&usb3_phy0>, <&usb3_phy0>;
        phy-names = "usb2-phy", "usb3-phy";
        snps,dis-u2-freeclk-exists-quirk;
      };
    };