1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/usb/dwc2.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: DesignWare HS OTG USB 2.0 controller Bindings 8 9maintainers: 10 - Rob Herring <robh@kernel.org> 11 12properties: 13 compatible: 14 oneOf: 15 - const: brcm,bcm2835-usb 16 - const: hisilicon,hi6220-usb 17 - items: 18 - const: rockchip,rk3066-usb 19 - const: snps,dwc2 20 - items: 21 - enum: 22 - rockchip,px30-usb 23 - rockchip,rk3036-usb 24 - rockchip,rk3188-usb 25 - rockchip,rk3228-usb 26 - rockchip,rk3288-usb 27 - rockchip,rk3328-usb 28 - rockchip,rk3368-usb 29 - rockchip,rv1108-usb 30 - const: rockchip,rk3066-usb 31 - const: snps,dwc2 32 - const: lantiq,arx100-usb 33 - const: lantiq,xrx200-usb 34 - items: 35 - enum: 36 - amlogic,meson8-usb 37 - amlogic,meson8b-usb 38 - amlogic,meson-gxbb-usb 39 - amlogic,meson-g12a-usb 40 - const: snps,dwc2 41 - const: amcc,dwc-otg 42 - const: apm,apm82181-dwc-otg 43 - const: snps,dwc2 44 - const: st,stm32f4x9-fsotg 45 - const: st,stm32f4x9-hsotg 46 - const: st,stm32f7-hsotg 47 - const: st,stm32mp15-fsotg 48 - items: 49 - const: st,stm32mp15-hsotg 50 - const: snps,dwc2 51 - const: samsung,s3c6400-hsotg 52 53 reg: 54 maxItems: 1 55 56 interrupts: 57 maxItems: 1 58 59 clocks: 60 maxItems: 1 61 62 clock-names: 63 items: 64 - const: otg 65 66 resets: 67 items: 68 - description: common reset 69 - description: ecc reset 70 minItems: 1 71 72 reset-names: 73 items: 74 - const: dwc2 75 - const: dwc2-ecc 76 minItems: 1 77 78 phys: 79 maxItems: 1 80 81 phy-names: 82 const: usb2-phy 83 84 power-domains: 85 maxItems: 1 86 87 vbus-supply: 88 description: reference to the VBUS regulator. Depending on the current mode 89 this is enabled (in "host" mode") or disabled (in "peripheral" mode). The 90 regulator is updated if the controller is configured in "otg" mode and the 91 status changes between "host" and "peripheral". 92 93 vusb_d-supply: 94 description: phandle to voltage regulator of digital section, 95 96 vusb_a-supply: 97 description: phandle to voltage regulator of analog section. 98 99 usb33d-supply: 100 description: reference to the VBUS and ID sensing comparators supply, in 101 order to perform OTG operation, used on STM32MP15 SoCs. 102 103 dr_mode: 104 enum: [host, peripheral, otg] 105 106 usb-role-switch: 107 $ref: /schemas/types.yaml#/definitions/flag 108 description: Support role switch. 109 110 g-rx-fifo-size: 111 $ref: /schemas/types.yaml#/definitions/uint32 112 description: size of rx fifo size in gadget mode. 113 114 g-np-tx-fifo-size: 115 $ref: /schemas/types.yaml#/definitions/uint32 116 description: size of non-periodic tx fifo size in gadget mode. 117 118 g-tx-fifo-size: 119 $ref: /schemas/types.yaml#/definitions/uint32-array 120 description: size of periodic tx fifo per endpoint (except ep0) in gadget mode. 121 122 snps,need-phy-for-wake: 123 $ref: /schemas/types.yaml#/definitions/flag 124 description: If present indicates that the phy needs to be left on for 125 remote wakeup during suspend. 126 127 snps,reset-phy-on-wake: 128 $ref: /schemas/types.yaml#/definitions/flag 129 description: If present indicates that we need to reset the PHY when we 130 detect a wakeup. This is due to a hardware errata. 131 132required: 133 - compatible 134 - reg 135 - interrupts 136 - clocks 137 - clock-names 138 139additionalProperties: false 140 141examples: 142 - | 143 usb@101c0000 { 144 compatible = "rockchip,rk3066-usb", "snps,dwc2"; 145 reg = <0x10180000 0x40000>; 146 interrupts = <18>; 147 clocks = <&usb_otg_ahb_clk>; 148 clock-names = "otg"; 149 phys = <&usbphy>; 150 phy-names = "usb2-phy"; 151 }; 152 153... 154