1* Mediatek Universal Flash Storage (UFS) Host Controller 2 3UFS nodes are defined to describe on-chip UFS hardware macro. 4Each UFS Host Controller should have its own node. 5 6To bind UFS PHY with UFS host controller, the controller node should 7contain a phandle reference to UFS M-PHY node. 8 9Required properties for UFS nodes: 10- compatible : Compatible list, contains the following controller: 11 "mediatek,mt8183-ufshci" for MediaTek UFS host controller 12 present on MT81xx chipsets. 13- reg : Address and length of the UFS register set. 14- phys : phandle to m-phy. 15- clocks : List of phandle and clock specifier pairs. 16- clock-names : List of clock input name strings sorted in the same 17 order as the clocks property. "ufs" is mandatory. 18 "ufs": ufshci core control clock. 19- freq-table-hz : Array of <min max> operating frequencies stored in the same 20 order as the clocks property. If this property is not 21 defined or a value in the array is "0" then it is assumed 22 that the frequency is set by the parent clock or a 23 fixed rate clock source. 24- vcc-supply : phandle to VCC supply regulator node. 25 26Example: 27 28 ufsphy: phy@11fa0000 { 29 ... 30 }; 31 32 ufshci@11270000 { 33 compatible = "mediatek,mt8183-ufshci"; 34 reg = <0 0x11270000 0 0x2300>; 35 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>; 36 phys = <&ufsphy>; 37 38 clocks = <&infracfg_ao INFRACFG_AO_UFS_CG>; 39 clock-names = "ufs"; 40 freq-table-hz = <0 0>; 41 42 vcc-supply = <&mt_pmic_vemc_ldo_reg>; 43 }; 44