1* Mediatek Universal Flash Storage (UFS) Host Controller 2 3UFS nodes are defined to describe on-chip UFS hardware macro. 4Each UFS Host Controller should have its own node. 5 6To bind UFS PHY with UFS host controller, the controller node should 7contain a phandle reference to UFS M-PHY node. 8 9Required properties for UFS nodes: 10- compatible : Compatible list, contains the following controller: 11 "mediatek,mt8183-ufshci" for MediaTek UFS host controller 12 present on MT8183 chipsets. 13 "mediatek,mt8192-ufshci" for MediaTek UFS host controller 14 present on MT8192 chipsets. 15- reg : Address and length of the UFS register set. 16- phys : phandle to m-phy. 17- clocks : List of phandle and clock specifier pairs. 18- clock-names : List of clock input name strings sorted in the same 19 order as the clocks property. "ufs" is mandatory. 20 "ufs": ufshci core control clock. 21- freq-table-hz : Array of <min max> operating frequencies stored in the same 22 order as the clocks property. If this property is not 23 defined or a value in the array is "0" then it is assumed 24 that the frequency is set by the parent clock or a 25 fixed rate clock source. 26- vcc-supply : phandle to VCC supply regulator node. 27 28Example: 29 30 ufsphy: phy@11fa0000 { 31 ... 32 }; 33 34 ufshci@11270000 { 35 compatible = "mediatek,mt8183-ufshci"; 36 reg = <0 0x11270000 0 0x2300>; 37 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>; 38 phys = <&ufsphy>; 39 40 clocks = <&infracfg_ao INFRACFG_AO_UFS_CG>; 41 clock-names = "ufs"; 42 freq-table-hz = <0 0>; 43 44 vcc-supply = <&mt_pmic_vemc_ldo_reg>; 45 }; 46