xref: /freebsd/sys/contrib/device-tree/Bindings/ufs/mediatek,ufs.yaml (revision 9978553d0199e7ec0bdd1c44fc7f6c7b0c11e43b)
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/ufs/mediatek,ufs.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mediatek Universal Flash Storage (UFS) Controller
8
9maintainers:
10  - Stanley Chu <stanley.chu@mediatek.com>
11
12properties:
13  compatible:
14    enum:
15      - mediatek,mt8183-ufshci
16      - mediatek,mt8192-ufshci
17      - mediatek,mt8195-ufshci
18
19  clocks:
20    minItems: 1
21    maxItems: 8
22
23  clock-names:
24    minItems: 1
25    maxItems: 8
26
27  phys:
28    maxItems: 1
29
30  reg:
31    maxItems: 1
32
33  vcc-supply: true
34
35  mediatek,ufs-disable-mcq:
36    $ref: /schemas/types.yaml#/definitions/flag
37    description: The mask to disable MCQ (Multi-Circular Queue) for UFS host.
38
39required:
40  - compatible
41  - clocks
42  - clock-names
43  - phys
44  - reg
45  - vcc-supply
46
47unevaluatedProperties: false
48
49allOf:
50  - $ref: ufs-common.yaml
51
52  - if:
53      properties:
54        compatible:
55          contains:
56            enum:
57              - mediatek,mt8195-ufshci
58    then:
59      properties:
60        clocks:
61          minItems: 8
62        clock-names:
63          items:
64            - const: ufs
65            - const: ufs_aes
66            - const: ufs_tick
67            - const: unipro_sysclk
68            - const: unipro_tick
69            - const: unipro_mp_bclk
70            - const: ufs_tx_symbol
71            - const: ufs_mem_sub
72    else:
73      properties:
74        clocks:
75          maxItems: 1
76        clock-names:
77          items:
78            - const: ufs
79
80examples:
81  - |
82    #include <dt-bindings/clock/mt8183-clk.h>
83    #include <dt-bindings/interrupt-controller/arm-gic.h>
84
85    soc {
86        #address-cells = <2>;
87        #size-cells = <2>;
88
89        ufs@ff3c0000 {
90            compatible = "mediatek,mt8183-ufshci";
91            reg = <0 0x11270000 0 0x2300>;
92            interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>;
93            phys = <&ufsphy>;
94
95            clocks = <&infracfg_ao CLK_INFRA_UFS>;
96            clock-names = "ufs";
97            freq-table-hz = <0 0>;
98
99            vcc-supply = <&mt_pmic_vemc_ldo_reg>;
100        };
101    };
102