1OMAP Timer bindings 2 3Required properties: 4- compatible: Should be set to one of the below. Please note that 5 OMAP44xx devices have timer instances that are 100% 6 register compatible with OMAP3xxx devices as well as 7 newer timers that are not 100% register compatible. 8 So for OMAP44xx devices timer instances may use 9 different compatible strings. 10 11 ti,omap2420-timer (applicable to OMAP24xx devices) 12 ti,omap3430-timer (applicable to OMAP3xxx/44xx devices) 13 ti,omap4430-timer (applicable to OMAP44xx devices) 14 ti,omap5430-timer (applicable to OMAP543x devices) 15 ti,am335x-timer (applicable to AM335x devices) 16 ti,am335x-timer-1ms (applicable to AM335x devices) 17 18- reg: Contains timer register address range (base address and 19 length). 20- interrupts: Contains the interrupt information for the timer. The 21 format is being dependent on which interrupt controller 22 the OMAP device uses. 23- ti,hwmods: Name of the hwmod associated to the timer, "timer<X>", 24 where <X> is the instance number of the timer from the 25 HW spec. 26 27Optional properties: 28- ti,timer-alwon: Indicates the timer is in an alway-on power domain. 29- ti,timer-dsp: Indicates the timer can interrupt the on-chip DSP in 30 addition to the ARM CPU. 31- ti,timer-pwm: Indicates the timer can generate a PWM output. 32- ti,timer-secure: Indicates the timer is reserved on a secure OMAP device 33 and therefore cannot be used by the kernel. 34 35Example: 36 37timer12: timer@48304000 { 38 compatible = "ti,omap3430-timer"; 39 reg = <0x48304000 0x400>; 40 interrupts = <95>; 41 ti,hwmods = "timer12" 42 ti,timer-alwon; 43 ti,timer-secure; 44}; 45