1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/timer/nxp,tpm-timer.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NXP Low Power Timer/Pulse Width Modulation Module (TPM) 8 9maintainers: 10 - Dong Aisheng <aisheng.dong@nxp.com> 11 12description: | 13 The Timer/PWM Module (TPM) supports input capture, output compare, 14 and the generation of PWM signals to control electric motor and power 15 management applications. The counter, compare and capture registers 16 are clocked by an asynchronous clock that can remain enabled in low 17 power modes. TPM can support global counter bus where one TPM drives 18 the counter bus for the others, provided bit width is the same. 19 20properties: 21 compatible: 22 oneOf: 23 - const: fsl,imx7ulp-tpm 24 - items: 25 - const: fsl,imx8ulp-tpm 26 - const: fsl,imx7ulp-tpm 27 28 reg: 29 maxItems: 1 30 31 interrupts: 32 maxItems: 1 33 34 clocks: 35 items: 36 - description: SoC TPM ipg clock 37 - description: SoC TPM per clock 38 39 clock-names: 40 items: 41 - const: ipg 42 - const: per 43 44required: 45 - compatible 46 - reg 47 - interrupts 48 - clocks 49 - clock-names 50 51additionalProperties: false 52 53examples: 54 - | 55 #include <dt-bindings/clock/imx7ulp-clock.h> 56 #include <dt-bindings/interrupt-controller/arm-gic.h> 57 58 timer@40260000 { 59 compatible = "fsl,imx7ulp-tpm"; 60 reg = <0x40260000 0x1000>; 61 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 62 clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>, 63 <&pcc2 IMX7ULP_CLK_LPTPM5>; 64 clock-names = "ipg", "per"; 65 }; 66