1c66ec88fSEmmanuel Vadot# SPDX-License-Identifier: GPL-2.0 2c66ec88fSEmmanuel Vadot%YAML 1.2 3c66ec88fSEmmanuel Vadot--- 4c66ec88fSEmmanuel Vadot$id: http://devicetree.org/schemas/timer/arm,arch_timer_mmio.yaml# 5c66ec88fSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6c66ec88fSEmmanuel Vadot 7c66ec88fSEmmanuel Vadottitle: ARM memory mapped architected timer 8c66ec88fSEmmanuel Vadot 9c66ec88fSEmmanuel Vadotmaintainers: 10c66ec88fSEmmanuel Vadot - Marc Zyngier <marc.zyngier@arm.com> 11c66ec88fSEmmanuel Vadot - Mark Rutland <mark.rutland@arm.com> 12c66ec88fSEmmanuel Vadot 13c66ec88fSEmmanuel Vadotdescription: |+ 14c66ec88fSEmmanuel Vadot ARM cores may have a memory mapped architected timer, which provides up to 8 15c66ec88fSEmmanuel Vadot frames with a physical and optional virtual timer per frame. 16c66ec88fSEmmanuel Vadot 17c66ec88fSEmmanuel Vadot The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs. 18c66ec88fSEmmanuel Vadot 19c66ec88fSEmmanuel Vadotproperties: 20c66ec88fSEmmanuel Vadot compatible: 21c66ec88fSEmmanuel Vadot items: 22c66ec88fSEmmanuel Vadot - enum: 23c66ec88fSEmmanuel Vadot - arm,armv7-timer-mem 24c66ec88fSEmmanuel Vadot 25c66ec88fSEmmanuel Vadot reg: 26c66ec88fSEmmanuel Vadot maxItems: 1 27c66ec88fSEmmanuel Vadot description: The control frame base address 28c66ec88fSEmmanuel Vadot 29c66ec88fSEmmanuel Vadot '#address-cells': 30c66ec88fSEmmanuel Vadot enum: [1, 2] 31c66ec88fSEmmanuel Vadot 32c66ec88fSEmmanuel Vadot '#size-cells': 33c66ec88fSEmmanuel Vadot const: 1 34c66ec88fSEmmanuel Vadot 35c66ec88fSEmmanuel Vadot ranges: true 36c66ec88fSEmmanuel Vadot 37c66ec88fSEmmanuel Vadot clock-frequency: 38c66ec88fSEmmanuel Vadot description: The frequency of the main counter, in Hz. Should be present 39c66ec88fSEmmanuel Vadot only where necessary to work around broken firmware which does not configure 40c66ec88fSEmmanuel Vadot CNTFRQ on all CPUs to a uniform correct value. Use of this property is 41c66ec88fSEmmanuel Vadot strongly discouraged; fix your firmware unless absolutely impossible. 42c66ec88fSEmmanuel Vadot 43c66ec88fSEmmanuel Vadot always-on: 44c66ec88fSEmmanuel Vadot type: boolean 45c66ec88fSEmmanuel Vadot description: If present, the timer is powered through an always-on power 46c66ec88fSEmmanuel Vadot domain, therefore it never loses context. 47c66ec88fSEmmanuel Vadot 48c66ec88fSEmmanuel Vadot arm,cpu-registers-not-fw-configured: 49c66ec88fSEmmanuel Vadot type: boolean 50c66ec88fSEmmanuel Vadot description: Firmware does not initialize any of the generic timer CPU 51c66ec88fSEmmanuel Vadot registers, which contain their architecturally-defined reset values. Only 52c66ec88fSEmmanuel Vadot supported for 32-bit systems which follow the ARMv7 architected reset 53c66ec88fSEmmanuel Vadot values. 54c66ec88fSEmmanuel Vadot 55c66ec88fSEmmanuel Vadot arm,no-tick-in-suspend: 56c66ec88fSEmmanuel Vadot type: boolean 57c66ec88fSEmmanuel Vadot description: The main counter does not tick when the system is in 58c66ec88fSEmmanuel Vadot low-power system suspend on some SoCs. This behavior does not match the 59c66ec88fSEmmanuel Vadot Architecture Reference Manual's specification that the system counter "must 60c66ec88fSEmmanuel Vadot be implemented in an always-on power domain." 61c66ec88fSEmmanuel Vadot 62c66ec88fSEmmanuel VadotpatternProperties: 63c66ec88fSEmmanuel Vadot '^frame@[0-9a-z]*$': 64c66ec88fSEmmanuel Vadot type: object 657ef62cebSEmmanuel Vadot additionalProperties: false 66c66ec88fSEmmanuel Vadot description: A timer node has up to 8 frame sub-nodes, each with the following properties. 67c66ec88fSEmmanuel Vadot properties: 68c66ec88fSEmmanuel Vadot frame-number: 69*fac71e4eSEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 70c66ec88fSEmmanuel Vadot minimum: 0 71c66ec88fSEmmanuel Vadot maximum: 7 72c66ec88fSEmmanuel Vadot 73c66ec88fSEmmanuel Vadot interrupts: 74c66ec88fSEmmanuel Vadot minItems: 1 75c66ec88fSEmmanuel Vadot items: 76c66ec88fSEmmanuel Vadot - description: physical timer irq 77c66ec88fSEmmanuel Vadot - description: virtual timer irq 78c66ec88fSEmmanuel Vadot 79c66ec88fSEmmanuel Vadot reg: 80c66ec88fSEmmanuel Vadot minItems: 1 81c66ec88fSEmmanuel Vadot items: 82c66ec88fSEmmanuel Vadot - description: 1st view base address 83c66ec88fSEmmanuel Vadot - description: 2nd optional view base address 84c66ec88fSEmmanuel Vadot 85c66ec88fSEmmanuel Vadot required: 86c66ec88fSEmmanuel Vadot - frame-number 87c66ec88fSEmmanuel Vadot - interrupts 88c66ec88fSEmmanuel Vadot - reg 89c66ec88fSEmmanuel Vadot 90c66ec88fSEmmanuel Vadotrequired: 91c66ec88fSEmmanuel Vadot - compatible 92c66ec88fSEmmanuel Vadot - reg 93c66ec88fSEmmanuel Vadot - '#address-cells' 94c66ec88fSEmmanuel Vadot - '#size-cells' 95c66ec88fSEmmanuel Vadot 96c66ec88fSEmmanuel VadotadditionalProperties: false 97c66ec88fSEmmanuel Vadot 98c66ec88fSEmmanuel Vadotexamples: 99c66ec88fSEmmanuel Vadot - | 100c66ec88fSEmmanuel Vadot timer@f0000000 { 101c66ec88fSEmmanuel Vadot compatible = "arm,armv7-timer-mem"; 102c66ec88fSEmmanuel Vadot #address-cells = <1>; 103c66ec88fSEmmanuel Vadot #size-cells = <1>; 104c66ec88fSEmmanuel Vadot ranges = <0 0xf0001000 0x1000>; 105c66ec88fSEmmanuel Vadot reg = <0xf0000000 0x1000>; 106c66ec88fSEmmanuel Vadot clock-frequency = <50000000>; 107c66ec88fSEmmanuel Vadot 108c66ec88fSEmmanuel Vadot frame@0 { 109c66ec88fSEmmanuel Vadot frame-number = <0>; 110c66ec88fSEmmanuel Vadot interrupts = <0 13 0x8>, 111c66ec88fSEmmanuel Vadot <0 14 0x8>; 112c66ec88fSEmmanuel Vadot reg = <0x0000 0x1000>, 113c66ec88fSEmmanuel Vadot <0x1000 0x1000>; 114c66ec88fSEmmanuel Vadot }; 115c66ec88fSEmmanuel Vadot 116c66ec88fSEmmanuel Vadot frame@2000 { 117c66ec88fSEmmanuel Vadot frame-number = <1>; 118c66ec88fSEmmanuel Vadot interrupts = <0 15 0x8>; 119c66ec88fSEmmanuel Vadot reg = <0x2000 0x1000>; 120c66ec88fSEmmanuel Vadot }; 121c66ec88fSEmmanuel Vadot }; 122c66ec88fSEmmanuel Vadot 123c66ec88fSEmmanuel Vadot... 124